System and method for routing in an electronic design
AssigneeCadence Design Systems, Inc.
InventorArnold Jean Marie Gustave Ginetti
Life of this patent
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Abstract
Embodiments include herein are directed towards a method for electronic circuit design. Embodiments may include receiving a selection of an instance associated with an electronic design at an electronic design schematic displayed on a graphical user interface. Embodiments may also include selecting a corresponding instance within an electronic design layout displayed on a graphical user interface. Embodiments may further include receiving a selection of a source topology and routing at the electronic design layout displayed on the graphical user interface, based upon at least in part, the source topology.
Claims20
A computer-implemented method comprising:
- receiving a selection of an instance associated with an electronic design at an electronic design schematic;
- selecting a corresponding instance within an electronic design layout displayed on a graphical user interface;
- receiving a selection of a source topology from a plurality of stored routing topologies, wherein a routing topology refers to a way a set of instance geometries are physically connected together;
- automatically extracting a routing topology prior to routing;
- and
- routing at the electronic design layout displayed on the graphical user interface, based upon at least in part, the source topology.
A non-transitory computer-readable storage medium having stored thereon instructions that when executed by a machine result in the following operations:
- receiving a selection of an instance associated with an electronic design at an electronic design schematic;
- automatically selecting a corresponding instance within an electronic design layout displayed on a graphical user interface;
- receiving a selection of a source topology from a plurality of stored routing topologies, wherein a routing topology refers to a way a set of instance geometries are physically connected together;
- routing at the electronic design layout displayed on the graphical user interface, based upon at least in part, the source topology;
- and
- analyzing layout routing topology to determine that only paths, path segments, and vias are included.
A system comprising:
- a processor configured to receive a selection of an instance associated with an electronic design at an electronic design schematic, the processor configured to allow for selection of a corresponding instance within an electronic design layout displayed on a graphical user interface, the processor further configured to receive a selection of a source topology from a plurality of stored routing topologies, wherein a routing topology refers to a way a set of instance geometries are physically connected together, the processor further configured to extract a routing topology prior to routing, the processor further configured to cause a routing at the electronic design layout displayed on the graphical user interface, based upon at least in part, the source topology.
Dependencies are inferred from the claim text.