Device verification method, UVM verification platform, electronic apparatus and storage medium

An electronic apparatus, comprising a memory and a processor, wherein the memory stores a computer program, and the processor, when calling the computer program in the memory, implements following operations:

• determining a transaction class corresponding to a device under test, and instantiating a first interface in a callback function of the transaction class;
• sending input data to the device under test based on a bus protocol, and sequentially adding the input data to an array of the first interface according to addresses of the input data;
• instantiating a second interface in a monitor device of a Universal Verification Methodology (UVM) verification platform, and sequentially adding output data to an array of the second interface according to addresses of the output data, wherein the output data are processing results of the input data by the device under test;
• and
• comparing the input data and the output data that have same addresses in the array of the first interface and the array of the second interface, and outputting a verification result of the device under test according to a comparison result,
• wherein comparing the input data and the output data that have same addresses in the array of the first interface and the array of the second interface comprises:
• sending the input data in the array of the first interface and the output data in the array of the second interface to a scoreboard of the UVM verification platform;
• and
• comparing the input data and the output data that have the same addresses through the scoreboard.

A non-transitory storage medium, wherein the non-transitory storage medium stores a computer executable instruction, and the computer executable instruction, when loaded and executed by a processor, causes the processor to implement following operations:

• determining a transaction class corresponding to a device under test, and instantiating a first interface in a callback function of the transaction class;
• sending input data to the device under test based on a bus protocol, and sequentially adding the input data to an array of the first interface according to addresses of the input data;
• instantiating a second interface in a monitor device of a Universal Verification Methodology (UVM) verification platform, and sequentially adding output data to an array of the second interface according to addresses of the output data, wherein the output data are processing results of the input data by the device under test;
• and
• comparing the input data and the output data that have same addresses in the array of the first interface and the array of the second interface, and outputting a verification result of the device under test according to a comparison result,
• wherein comparing the input data and the output data that have same addresses in the array of the first interface and the array of the second interface comprises:
• sending the input data in the array of the first interface and the output data in the array of the second interface to a scoreboard of the UVM verification platform;
• and
• comparing the input data and the output data that have the same addresses through the scoreboard.