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US 11,893,283 B2Granted
Asynchronous process topology in a memory device
AssigneeMicron Technology, Inc.
InventorsGlen E. Hush, Richard C. Murphy, Honglin Sun
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Abstract
Apparatuses and methods can be related to generating an asynchronous process topology in a memory device. The topology can be generated based on the results of a number of processes. The processes can be asynchronous given that the processing resources that implement the processes do not use a clock signal to generate the topology.
Claims20
An apparatus, comprising:
- a memory array configured to store data and to function synchronously with a clock signal received from a host device;
- a processing resource, implemented in hardware, coupled to the memory array and configured to:
- execute a first process utilizing the data stored by the memory array responsive to a receipt of a signal by the apparatus, wherein the first process comprises a first layer of an artificial neural network;
- determine asynchronously, without reference to a plurality of clock signals including the clock signal of the host device, that a result of the first process is greater than a threshold value;
- and
- execute a second process, comprising logical operations, on the data responsive to the determination that the result of the first process is greater than the threshold value,. wherein the second process comprises a second layer of the artificial neural network;
- wherein the second process is initiated without the host device providing an additional command.
4 more elements
A method comprising:
- performing a first process, at a first processing resource implemented under a memory array of a memory device, responsive to a receipt of a command by the memory device, wherein the first process is performed utilizing a first portion of data stored in the memory array, and wherein the first processing resource comprises as a first layer of an artificial neural network;
- performing a determination of whether to provide a signal to a second processing resource based on a result of the first process;
- selecting the second processing resource from a plurality of processing resources based on the result of the first process;
- and
- performing, utilizing the second processing resource implemented under the memory array, a second process responsive to a receipt of the signal, wherein the second process is performed utilizing a second portion of the data stored in the memory array, and wherein the second processing resource comprises as a second layer of the artificial neural network;
- wherein the second process is initiated without a host device providing an additional command.
3 more elements
An apparatus comprising:
- a first memory array implemented in a first layer of a memory device;
- a second memory array implemented in the first layer of the memory device;
- a first processing resource implemented in a second layer of the memory device under the first memory array and configured to perform a first process utilizing a first data value from the first memory array;
- a comparator implemented in the second layer of the memory device and coupled to the first processing resource and a second processing resource and configured to provide a signal to the second processing resource based on a result of the first process;
- and
- wherein the first processing resource comprises as a first artificial neural network;
- and
- the second processing resource implemented in the second layer of the memory device under the second memory array and configured to perform a second process utilizing a second data value from the second memory array;
- wherein the second processing resource is configured to perform the second process responsive to a receipt of the signal from the comparator;
- and
- wherein the second processing resource comprises as a second artificial neural network;
- and
- wherein the second process is initiated without a host device providing an additional command.
10 more elements
Dependencies are inferred from the claim text.