SSD architecture for FPGA based acceleration
AssigneeSamsung Electronics Co., Ltd.
InventorsRamdas P. Kachare, Fred Worley, Harry Rogers, Wentao Wu, Nagarajan Subramaniyan
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Abstract
A system is disclosed. An upstream interface enables communication with a processor; a downstream interface enables communication with a storage device. The system may also include an acceleration module implemented using hardware to execute an acceleration instruction. The storage device may include an endpoint of the storage device for communicating with the acceleration module, a controller to manage operations of the storage device, storage for data, and a storage device acceleration module to assist the acceleration module in executing the acceleration instruction.
Claims20
A system, comprising:
- a first interface for communicating with a processor;
- a second interface for communicating with a storage device;
- an accelerator to execute an acceleration instruction, the accelerator implemented using hardware, the accelerator configured to send an instruction to the storage device based at least in part on the acceleration instruction;
- and
- the storage device, including:
- a port of the storage device for communicating with the accelerator;
- a controller to manage operations of the storage device;
- storage to store a data;
- and
- a storage device acceleration manager to send the data to the accelerator based at least in part on the instruction,
- wherein a storage instruction is transmitted from the first interface to the second interface.
An accelerator implemented using hardware, comprising:
- a logic to execute an acceleration instruction;
- a first interface for communicating with a processor;
- and
- a second interface for communicating with a storage device, the storage device including a storage device acceleration manager to assist the accelerator in executing the acceleration instruction,
- wherein a storage instruction is transmitted from the first interface to the second interface, and
- wherein the accelerator is configured to send an instruction to the storage device and to receive a data from the storage device based at least in part on the acceleration instruction.
A method, comprising:
- receiving a transaction from a first device at a first interface of an accelerator;
- determining at the accelerator a type of the transaction;
- based at least in part on determining that the type of the transaction is an acceleration instruction, processing the transaction at a logic of the accelerator;
- and
- based at least in part on determining that the type of the transaction is a storage instruction, transmitting the transaction from the first interface of the accelerator to a second device using a second interface of the accelerator,
- wherein the accelerator is configured to send an instruction to a storage device and to receive a data from the storage device based at least in part on the transaction being an acceleration instruction.
Dependencies are inferred from the claim text.