US 11,892,871 B2 · Clock synchronization system and operation method thereof capable of synchronizing operation time of internal circuits

Abstract

A host circuit includes a first clock generator, a first input output interface, a first communication interface, and a first processor. The first clock generator generates a first clock signal. The first processor outputs a trigger signal through the first input output interface, records a first clock count of the first clock generator at the same time, and outputs the first clock count through the first communication interface. A slave circuit includes a second clock generator, a second input output interface, a second communication interface, and a second processor. The second clock generator generates a second clock signal. When receiving the trigger signal, the second processor records a second clock count of the second clock generator, and calculates a time difference between the first clock signal and the second clock signal according to the first clock count and the second clock count.

Claims18

Dependent claims

A clock synchronization system comprising:

a host circuit comprising:
a first clock generator configured to generate a first clock signal;
a first input output interface;
a first communication interface;
and
a first processor configured to:
output a trigger signal through the first input output interface;
record a first clock count of the first clock generator simultaneously when the trigger signal is issued;
and
output the first clock count from the first communication interface;
and
a slave circuit comprising:
a second clock generator configured to generate a second clock signal;
a second input output interface coupled to the first input output interface configured to receive the trigger signal;
a second communication interface coupled to the first communication interface;
and
a second processor configured to:
record a second clock count of the second clock generator when the trigger signal is received from the second input output interface;
and
calculate a time difference between the first clock signal and the second clock signal according to the first clock count and the second clock count.

17 more elements

An operation method of a clock synchronization system, the clock synchronization system comprising a host circuit and a slave circuit, the host circuit comprising a first clock generator, the slave circuit comprising a second clock generator, the method comprising:

the first clock generator generating a first clock signal;
the second clock generator generating a second clock signal;
the host circuit outputting a trigger signal to the slave circuit;
when the trigger signal is issued, the host circuit simultaneously recording a first clock count of the first clock generator;
the host circuit outputting the first clock count to the slave circuit;
when the slave circuit receives the trigger signal, the slave circuit recording a second clock count of the second clock generator;
and
the slave circuit calculating a time difference between the first clock signal and the second clock signal according to the first clock count and the second clock count.

5 more elements

Dependencies are inferred from the claim text.

Clock synchronization system and operation method thereof capable of synchronizing operation time of internal circuits

Life of this patent

Clock synchronization system and operation method thereof capable of synchronizing operation time of internal circuits

Life of this patent

Abstract

Claims18