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US 11,890,538 B2Granted
Scalable game console CPU / GPU design for home console and cloud gaming
AssigneeSony Interactive Entertainment Inc.
InventorRoelof Roderick Colenbrander
Life of this patent
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Abstract
In a multi-GPU simulation environment, frame buffer management may be implemented by multiple GPUs rendering respective frames of video, or by rendering respective portions of each frame of video. One of the GPUs controls HDMI frame output by virtue of receiving frame information from the other GPU(s) and reading out complete frames through a physically connected HDMI output port. Or, the outputs of the GPUs can be multiplexed together.
Claims20
An apparatus comprising:
- at least a first graphics processing unit (GPU);
- at least a second GPU communicatively coupled to the first GPU;
- wherein the GPUs are programmed to:
- render respective portions of video, such that the first GPU renders first portions of video and the second GPU renders second portions of video, the first and second portions being different from each other, wherein the first GPU is programmed to combine the first and second portions to render an output establishing a combined video, the combined video rendered by throttling, using one or more over clock techniques, at least one effect based at least in part on a current GPU usage allocation, wherein throttling at least one effect comprises throttling at least one particle effect.
1 more element
In a multi-graphics processing unit (GPU) simulation environment, a method comprising:
- causing plural GPUs to render respective frames of video, or to render respective portions of each frame of video, or to render respective frames and respective portions of frames of video;
- controlling frame output using a first one of the GPUs receiving frame information from at least one other of the GPU(s), or multiplexing outputs of the GPUs together, or both using a first one of the GPUs receiving frame information from at least one other of the GPU(s) and multiplexing outputs of the GPUs together, wherein the first one of the GPUs combines respective video components from the GPUs to render a combined video, the combined video rendered by throttling, using one or more over clock techniques, at least one effect based at least in part on a current usage allocation, wherein throttling at least one effect comprises throttling at least one particle effect.
A computer simulation apparatus, comprising:
- at least a first graphics processing unit (GPU) programmed for rendering a respective first portion of simulation video;
- at least a second GPU programmed for rendering a respective second portion of simulation video;
- and
- at least the first GPU programmed to combine the first and second portions and to render an output establishing a complete simulation video, the first GPU reading registers from at least one of the GPUs to determine current usage allocation and throttling, using one or more over clock techniques, at least one effect of the complete simulation video based at least in part on the current usage allocation.
1 more element
Dependencies are inferred from the claim text.