Methods for forming memory devices, and associated devices and systems
AssigneeMicron Technology, Inc.
InventorMichael B. Jeppson
Life of this patent
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Abstract
Methods of manufacturing memory devices, and associated systems and devices, are disclosed herein. In one embodiment, a method of manufacturing a memory device includes (a) removing a portion of an insulative material to define a recess, (b) forming a memory stack in the recess, and (c) etching the memory stack to define a plurality of memory elements. In some embodiments, the method can further include forming conductive vias in a remaining portion of the insulative material, and forming a metallization structure electrically coupling the conductive vias to corresponding ones of the memory elements.
Claims19
A method of manufacturing a memory device, the method comprising:
- forming a memory stack in a recess of an insulative material by—
- forming a metallization layer in the recess;
- depositing a selector layer in the recess over the metallization layer;
- depositing a memory cell layer over the selector layer;
- and
- etching the memory stack to define a plurality of memory elements.
A method of manufacturing a memory device, the method comprising:
- forming a memory stack in a recess in an insulative material such that the memory stack has an elevation greater than an elevation of an upper surface of the insulative material;
- etching the memory stack to define a plurality of memory elements;
- and
- planarizing the memory elements to have a same elevation as the elevation of the upper surface of the insulative material.
A method of manufacturing a memory device, the method comprising:
- forming a plurality of memory elements in a recess of a tile region of a second insulative layer, wherein the second insulative layer is positioned over a first insulative layer;
- forming a plurality of first conductive vias in a socket region of the second insulative layer;
- forming a plurality of second conductive vias in the first insulative layer;
- forming a first metallization layer electrically coupling the first conductive vias to corresponding ones of the memory elements;
- and
- forming a second metallization layer electrically coupling the second conductive vias to corresponding ones of the memory elements.
A method of manufacturing a memory device, the method comprising:
- forming a plurality of memory elements in a recess of a tile region of a second insulative layer, wherein the second insulative layer is positioned over a first insulative layer, and wherein forming the memory elements in the recess includes—
- depositing a selector layer in the recess;
- depositing a memory cell layer over the selector layer;
- and
- etching the selector layer and the memory cell layer to form the memory elements;
- and
- forming a plurality of conductive vias in a socket region of the second insulative layer.
A method of manufacturing a memory device, the method comprising:
- forming a memory stack in a recess of an insulative material by—
- depositing a selector layer in the recess;
- depositing a memory cell layer over the selector layer;
- and
- etching the memory stack to define a plurality of memory elements;
- forming a protective liner around individual ones of the memory elements;
- and
- removing a portion of the protective liner around the memory elements to expose a memory cell of each of the memory elements.
A method of manufacturing a memory device, the method comprising:
- forming a memory stack in a recess of an insulative material by—
- depositing a selector layer in the recess;
- depositing a memory cell layer over the selector layer;
- and
- etching the memory stack to define a plurality of memory elements;
- depositing a dielectric material over the memory elements and an upper surface of the insulative material;
- and
- removing the dielectric material over the upper surface of the insulative material.
Dependencies are inferred from the claim text.