Memory cell including polarization retention member(s) including antiferroelectric layer over ferroelectric layer

A memory cell, comprising:

• a capacitor structure including:
• a first electrode;
• at least one polarization retention member over the first electrode, each polarization retention member including an antiferroelectric layer over and in contact with an interlayer over and in contact with a ferroelectric layer;
• and
• a first metal electrode over and in contact with an uppermost one of the antiferroelectric layer.

A ferroelectric field effect transistor (FeFET), comprising:

• a source region and a drain region in a semiconductor substrate;
• a gate stack including:
• a first insulator layer over and in contact with the semiconductor substrate between the source region and the drain region,
• at least one polarization retention member over the first insulator layer, each polarization retention member including an uppermost antiferroelectric layer, a ferroelectric layer and a first metal electrode;
• and
• a second metal electrode over and in contact with the uppermost antiferroelectric layer.