Integrated circuit structures comprising an isolation structure with different depths

An integrated circuit structure, comprising:

• a semiconductor material;
• a first active area in the semiconductor material;
• a second active area in the semiconductor material;
• a third active area in the semiconductor material;
• a first transistor in the first active area;
• a second transistor in the second active area;
• a third transistor in the third active area;
• a first conductor forming a control gate of the first transistor;
• a second conductor forming a control gate of the second transistor;
• and
• an isolation structure comprising a dielectric material deposited in a trench formed in the semiconductor material between the first active area and the second active area, and in the semiconductor material between the first active area and the third active area, the isolation structure further comprising:
• a first edge portion extending below a surface of the semiconductor material to a first depth;
• a second edge portion extending below the surface of the semiconductor material to the first depth;
• and
• an interior portion between the first edge portion and the second edge portion, and extending below the surface of the semiconductor material to a second depth, less than the first depth;
• wherein the first conductor further forms a control gate of the third transistor;
• wherein the isolation structure has an orientation that is parallel to the first conductor and parallel to the second conductor;
• and
• wherein the isolation structure further has an orientation that is orthogonal to the first conductor.

An integrated circuit structure, comprising:

• a semiconductor material having a particular conductivity type;
• a first active area in the semiconductor material;
• a second active area in the semiconductor material;
• and
• an isolation structure comprising a dielectric material deposited in a trench form in the semiconductor material between the first active area and the second active area, the isolation structure further comprising:
• a first edge portion extending below a surface of the semiconductor material to a first depth;
• a second edge portion extending below the surface of the semiconductor material to the first depth;
• an interior portion between the first edge portion and the second edge portion, and extending below the surface of the semiconductor material to a second depth, less than the first depth;
• a first conductive region in the semiconductor material extending below the interior portion and having the particular conductivity type;
• a second conductive region in the semiconductor material extending below the first edge portion and having the particular conductivity type;
• and
• a third conductive region in the semiconductor material extending below the second edge portion and having the particular conductivity type;
• wherein the first conductive region has a conductivity level higher than a conductivity level of the semiconductor material, and wherein the second conductive region and the third conductive region each have a conductivity level lower than the conductivity level of the first conductive region.

An integrated circuit structure, comprising:

• a semiconductor material having a particular conductivity type;
• a first active area in the semiconductor material;
• a second active area in the semiconductor material;
• and
• an isolation structure comprising a dielectric material deposited in a trench formed in the semiconductor material between the active area and the second active area, the isolation structure further comprising:
• a first edge portion extending below a surface of semiconductor material to a first depth;
• a second edge portion extending below the surface of semiconductor material to the first depth;
• an interior portion between the first edge portion and the second edge portion, and extending below the surface of the semiconductor material to a second depth, less than the first depth;
• a first conductive region in the semiconductor material extending below the interior portion and having the particular conductivity type;
• a second conductive region in the semiconductor material extending below the first edge portion and having the particular conductivity type;
• and
• a third conductive region in the semiconductor material extending below the second edge portion and having the particular conductivity type;
• wherein a depth of the first conductive region extends into the semiconductor material 20-30 nm below the interior portion.

An integrated circuit structure, comprising:

• a semiconductor material;
• a first active area in the semiconductor material;
• a second active area in the semiconductor material;
• a trench formed in the semiconductor material between the first active area and the second active area by anisotropically removing portions of the semiconductor material;
• and
• a dielectric material deposited in the trench;
• wherein the trench comprises:
• a first edge portion immediately adjacent the first active area and extending below a surface of the semiconductor material to a first depth;
• a second edge portion immediately adjacent the second active area and extending below the surface of the semiconductor material to the first depth;
• and
• an interior portion between the first edge portion and the second edge portion, and extending below the surface of the semiconductor material to a second depth, less than the first depth, for a distance that is treater than or equal to an attribute of the first active area selected from a group consisting of a width of the first active area and a length of the first active area.

An integrated circuit structure, comprising:

• a semiconductor material having a particular conductivity type;
• a first active area in the semiconductor material;
• a second active area in the semiconductor material;
• a first transistor in the first active area and having a source/drain region;
• a trench formed in the semiconductor material between the first active area and the second active area by anisotropically removing portions of the semiconductor material;
• and
• a dielectric material deposited in the trench;
• wherein the trench comprise:
• a first edge portion immediately adjacent the first active area and extending below a surface of the semiconductor material to a first depth;
• a second edge portion immediately adjacent the second active area and extending below the surface of the semiconductor material to the first depth;
• and
• an interior portion between the first edge portion and the second edge portion, and extending below the surface of the semiconductor material to a second depth, less than the gist depth;
• wherein the second depth is greater than or equal to a depth of the source/drain region.

An integrated circuit structure, comprising:

• a semiconductor material having a particular conductivity type;
• a first transistor in a first active area in the semiconductor material;
• a second transistor in a second active area in the semiconductor material;
• a first conductor forming a control gate of the first transistor;
• a second conductor forming a control gate of the second transistor;
• and
• an isolation structure comprising a dielectric material deposited in a trench formed in the semiconductor material between the first active area and the second active area, the isolation structure further comprising:
• a first edge portion extending below a surface of the semiconductor material to a first depth;
• a second edge portion extending below the surface of the semiconductor material to the first depth;
• and
• an interior portion between the first edge portion and the second edge portion, and extending below the surface of the semiconductor material to a second depth, less than the first depth, for a distance that si greater than or equal to a width of the first active area;
• wherein the isolation structure has an orientation that is parallel to the first conductor and parallel to the second conductor.

An integrated circuit structure, comprising:

• a semiconductor material having a particular conductivity type;
• a first transistor in a first active area in the semiconductor material;
• a second transistor in a second active area in the semiconductor material;
• a third transistor in a third active area in the semiconductor material;
• a first conductor forming a control gate of the first transistor and forming a control gate of the third transistor;
• a second conductor forming a control crate of the second transistor;
• and
• an isolation structure comprising a dielectric material deposited in a trench formed in the semiconductor material between the first active area and the second active area, and further in the semiconductor material between the first active area and the third active area, the isolation structure further comprising:
• a first edge portion extending below a surface of the semiconductor material to a depth;
• a second edge portion extending below the surface of the semiconductor material to the first depth;
• and
• an interior portion between the first edge portion and the second edge portion, and extending below the surface of the semiconductor material to a second depth, less than the first depth;
• wherein the isolation structure has an orientation that is parallel to the first conductor and parallel to the second conductor;
• and
• wherein the isolation structure further has an orientation that is orthogonal to the first conductor.

An integrated circuit structure, comprising:

• a semiconductor material having a particular conductivity type;
• a first transistor in a first active area in the semiconductor material;
• a second transistor in a second active area in the semiconductor material;
• first conductor forming a control gate of the first transistor;
• a second conductor forming a control gate of the second transistor;
• and
• an isolation structure comprising a dielectric material deposited in a trench formed in the semiconductor material between the first active area and the second, active area, the isolation structure further comprising:
• a first edge portion extending below a surface of the semiconductor material to a first depth;
• a second edge portion extending below the surface to the semiconductor material to the first depth;
• an interior portion between the first edge portion and the second edge portion, and extending below the surface of the semiconductor material to a second depth, less than the first depth;
• a first conductive region in the semiconductor material extending, below the interior portion and having the particular conductivity type;
• a second conductive region in the semiconductor material extending below the first edge portion and having the particular conductivity type;
• and
• a third conductive region in the semiconductor material extending below the second edge portion and having the particular conductivity type;
• wherein the isolation structure has an orientation that is parallel to the first conductor and parallel to the second conductor;
• and
• wherein the first conductive region has a conductivity level higher than a conductivity level of the semiconductor material, and wherein the second conductive region and the third conductive region each have a conductivity level lower than the conductivity level of the first conductive region.

An integrated circuit structure, comprising:

• a semiconductor material having a particular conductivity type;
• a first transistor in a first active area in the semiconductor material;
• a second transistor in a second active area in the semiconductor material;
• a first conductor forming a control gate of the first transistor;
• a second conductor forming a control gate of the second transistor;
• and
• an isolation structure comprising a dielectric material deposited in a trench formed in the semiconductor material between the first active area and the second active area, the isolation structure further comprising:
• a first edge portion extending below a surface of the semiconductor material to a first depth;
• a second edge portion extending below the surface of the semiconductor material to the first depth;
• an interior portion between the first edge portion and the second edge portion, and extending below the surface of the semiconductor material to a second depth, less than the first depth;
• a first conductive region in the semiconductor material extending below the interior portion and having the particular conductivity type;
• a second conductive region in the semiconductor material extending below the first edge portion and having the particular conductivity type;
• and
• a third conductivity region in the semiconductor material extending below the second edge portion and having the particular conductivity type;
• wherein the isolation structure has an orientation that is parallel to the first conductor and parallel to the second conductor;
• and
• wherein a depth of the first conductive region extends into the semiconductor material 20-30 nm below the interior portion.