Temperature compensation of analog CMOS physically unclonable function for yield enhancement

A system comprising:

• an analog complementary metal oxide semiconductor (CMOS) physically unclonable function (PUF) cell having at least one gate terminal;
• and
• a current-based temperature compensation circuit comprising:
• a reference buffer configured to receive a biasing reference voltage at a voltage input terminal and replicate the biasing reference voltage to first and second buffer terminals, at least one of the first and second buffer terminals electrically connected to the at least one gate terminal of the CMOS PUF cell;
• a biasing current mirror configured to receive a reference current at a current input terminal and replicate the reference current to the first buffer terminal;
• and
• a controller configured to compensate an output of the CMOS PUF cell for temperature variation based on a weighted sum of a bandgap current, a current proportional to absolute temperature, and a current complementary to absolute temperature.

A method comprising:

• receiving a biasing reference voltage at a voltage input terminal of a reference buffer in a current-based temperature compensation circuit;
• replicating the biasing reference voltage to first and second buffer terminals, at least one of the first and second buffer terminals electrically connected to at least one gate terminal of an analog complementary metal oxide semiconductor (CMOS) physically unclonable function (PUF) cell;
• receiving a reference current at a current input terminal of a biasing current mirror in the current-based temperature compensation circuit;
• replicating the reference current to the first buffer terminal;
• and
• using a controller in the current-based temperature compensation circuit, compensating an output of the CMOS PUF cell for temperature variation based on a weighted sum of a bandgap current, a current proportional to absolute temperature, and a current complementary to absolute temperature.