Power semiconductor device having elevated source regions and recessed body regions

A power semiconductor device, comprising:

• a semiconductor body having a surface;
• a control trench extending from the surface along a vertical direction into the semiconductor body;
• a control electrode arranged at least partially inside the control trench and configured to control a load current in the semiconductor body;
• at least two elevated source regions of a first conductivity type arranged in the semiconductor body adjacent to the control electrode;
• a recessed body region of a second conductivity type arranged adjacent to the elevated source regions and extending at least partially between the elevated source regions;
• and
• a conductive layer arranged on top of the semiconductor body and establishing an electrical contact with at least a portion of the elevated source regions and with at least a portion of the recessed body region,
• wherein at least one third contact surface between at least one of the elevated source regions and the conductive layer extends in a third horizontal plane and a fourth contact surface between the recessed body region and the conductive layer extends in a fourth horizontal plane, the fourth horizontal plane being located vertically below the third horizontal plane,
• wherein at a first lateral transition between each elevated source region and an adjacent recessed body region, the surface of the semiconductor body exhibits a first step,
• wherein each first step extends in parallel with a main lateral extension direction of the control trench,
• wherein at a second lateral transition between the at least two elevated source regions and portions of the recessed body regions that extend between the at least two elevated source regions, the surface of the semiconductor body exhibits a second step,
• wherein each second step is orthogonal to the main lateral extension direction of the control trench.

A power semiconductor device, comprising:

• a semiconductor body having a surface;
• a control trench extending from the surface along a vertical direction into the semiconductor body;
• a control electrode arranged at least partially inside the control trench and configured to control a load current in the semiconductor body;
• at least two elevated source regions of a first conductivity type arranged in the semiconductor body adjacent to the control electrode;
• a recessed body region of a second conductivity type arranged adjacent to the elevated source regions and extending at least partially between the elevated source regions;
• and
• a conductive layer arranged on top of the semiconductor body and establishing an electrical contact with at least a portion of the elevated source regions and with at least a portion of the recessed body region,
• wherein a horizontal contact surface between the recessed body region and the conductive layer extends in a horizontal plane,
• wherein a side contact surface between the conductive layer and a side face of the at least two elevated source regions is orthogonal to the horizontal plane of the horizontal contact surface,
• wherein at a first lateral transition between each elevated source region and an adjacent recessed body region, the surface of the semiconductor body exhibits a first step,
• wherein each first step extends in parallel with a main lateral extension direction of the control trench,
• wherein at a second lateral transition between the at least two elevated source regions and portions of the recessed body regions that extend between the at least two elevated source regions, the surface of the semiconductor body exhibits a second step,
• wherein each second step is orthogonal to the main lateral extension direction of the control trench.