Contact over active gate structures with conductive gate taps for advanced integrated circuit structure fabrication

An integrated circuit structure, comprising:

• a three-dimensional body;
• a gate structure completely surrounding a channel region of the three-dimensional body, the gate structure including a recessed conductive portion and a non-recessed conductive portion;
• an insulating layer on the recessed conductive portion of the gate structure and laterally adjacent to the non-recessed conductive portion of the gate structure, wherein the insulating layer has an uppermost surface at a same level as an uppermost surface of the non-recessed conductive portion of the gate structure;
• a conductive trench contact structure laterally adjacent to the gate structure, the conductive trench contact structure including a trench insulating layer thereon;
• an interlayer dielectric material above the gate structure and the conductive trench contact;
• an opening in the interlayer dielectric material, the opening exposing the non-recessed conductive portion of the gate structure;
• and
• a conductive structure in the opening, the conductive structure in direct contact with the non-recessed conductive portion of the gate structure.

A computing device, comprising:

• a board;
• and
• a component coupled to the board, the component including an integrated circuit structure, comprising:
• a fin;
• a gate structure over the fin, the gate structure including a recessed conductive portion and a non-recessed conductive portion;
• an insulating layer on the recessed conductive portion of the gate structure and laterally adjacent to the non-recessed conductive portion of the gate structure, wherein the insulating layer has an uppermost surface at a same level as an uppermost surface of the non-recessed conductive portion of the gate structure;
• a conductive trench contact structure laterally adjacent to the gate structure, the conductive trench contact structure including a trench insulating layer thereon;
• an interlayer dielectric material above the gate structure and the conductive trench contact;
• an opening in the interlayer dielectric material, the opening exposing the non-recessed conductive portion of the gate structure;
• and
• a conductive structure in the opening, the conductive structure in direct contact with the non-recessed conductive portion of the gate structure.

A computing device, comprising:

• a board;
• and
• a component coupled to the board, the component including an integrated circuit structure, comprising:
• a three-dimensional body;
• a gate structure completely surrounding a channel region of the three-dimensional body, the gate structure including a recessed conductive portion and a non-recessed conductive portion;
• an insulating layer on the recessed conductive portion of the gate structure and laterally adjacent to the non-recessed conductive portion of the gate structure, wherein the insulating layer has an uppermost surface at a same level as an uppermost surface of the non-recessed conductive portion of the gate structure;
• a conductive trench contact structure laterally adjacent to the gate structure, the conductive trench contact structure including a trench insulating layer thereon;
• an interlayer dielectric material above the gate structure and the conductive trench contact;
• an opening in the interlayer dielectric material, the opening exposing the non-recessed conductive portion of the gate structure;
• and
• a conductive structure in the opening, the conductive structure in direct contact with the non-recessed conductive portion of the gate structure.