Semiconductor device having a liner layer and method of fabricating the same

A semiconductor device, comprising:

• an active pattern on a substrate;
• a device isolation layer filling a trench that defines the active pattern;
• a plurality of semiconductor patterns that are stacked on the active pattern and vertically spaced apart from each other;
• a gate electrode on the plurality of semiconductor patterns;
• a liner layer on the plurality of semiconductor patterns and the device isolation layer, the liner layer surrounding each of the plurality of semiconductor patterns, the liner layer covering a top surface of the device isolation layer;
• and
• a gate insulating layer on the liner layer,
• wherein the liner layer comprises a same semiconductor material as the semiconductor patterns, and
• wherein the liner layer is interposed between the device isolation layer and the gate insulating layer.

A semiconductor device, comprising:

• an active pattern on a substrate;
• a plurality of semiconductor patterns that are stacked on the active pattern and vertically spaced apart from each other;
• a gate electrode on the plurality of semiconductor patterns, the gate electrode including a first portion in a space between adjacent ones of the semiconductor patterns and a second portion on the uppermost one of the semiconductor patterns;
• a gate spacer on a side surface of the second portion of the gate electrode;
• and
• a liner layer provided in the space and interposed between the first portion and the adjacent ones of the semiconductor patterns,
• wherein the liner layer comprises a same semiconductor material as the semiconductor patterns,
• wherein the liner layer includes a first region, which is interposed between the second portion and the uppermost semiconductor pattern, and a second region, which is interposed between the second portion and the gate spacer and contacts the gate spacer, and
• wherein the first region and the second region have different crystalline structures from each other.