Monolithic integration of high and low-side GaN FETs with screening back gating effect

An electronic device, comprising:

• a semiconductor die having a substrate, a buffer structure, a back barrier layer, a gallium nitride layer, a first transistor, a second transistor, and a hole injector structure;
• conductive leads;
• and
• a package structure that encloses the semiconductor die and portions of the conductive leads;
• the buffer structure over the substrate, the back barrier layer over the buffer structure, the back barrier layer including one of aluminum gallium nitride, aluminum nitride, indium aluminum nitride, and indium aluminum gallium nitride, the gallium nitride layer over the back barrier layer, and a hetero-epitaxy structure over the gallium nitride layer;
• the first transistor coupled to one of the conductive leads and having a first drain, a first gate, and a first source, the first drain partially in the hetero-epitaxy structure, the first gate over the hetero-epitaxy structure and spaced apart from the first drain, the first source partially in the hetero-epitaxy structure and spaced apart from the first gate;
• the second transistor coupled to another of the conductive leads and having a second drain, a second gate, and a second source, the second drain partially in the hetero-epitaxy structure and coupled to the first source, the second gate over the hetero-epitaxy structure and spaced apart from the second drain, the second source partially in the hetero-epitaxy structure and spaced apart from the second gate;
• and
• the hole injector structure having a doped gallium nitride structure and a conductive structure, the doped gallium nitride structure extending over the hetero-epitaxy structure, and the conductive structure partially over the doped gallium nitride structure.

A method of fabricating an electronic device, the method comprising:

• forming a buffer structure over a substrate;
• forming an aluminum gallium nitride, aluminum nitride, indium aluminum nitride, or indium aluminum gallium nitride back barrier layer on the buffer structure;
• forming a gallium nitride layer on the back barrier layer;
• forming a hetero-epitaxy structure on the gallium nitride layer;
• forming a doped gallium nitride structure of a hole injector on the hetero-epitaxy structure;
• forming conductive structures, including forming:
• a conductive structure of the hole injector partially over the doped gallium nitride structure;
• conductive drain and source contacts of respective first and second transistors partially in the hetero-epitaxy structure;
• and
• conductive gate contacts of the respective first and second transistors on the hetero-epitaxy structure.