Thin-film transistors

An electronic display comprising an array of thin-film transistors on a nonconductive substrate, wherein individual thin-film transistors comprise:

• a semiconductor layer on and in direct contact with the nonconductive substrate;
• a source electrode adjacent a first side of the semiconductor layer and partially overlapping a first peripheral portion of the semiconductor layer, wherein the source electrode is in direct contact with the nonconductive substrate;
• a drain electrode adjacent a second side of the semiconductor layer and partially overlapping a second peripheral portion of the semiconductor layer, wherein the drain electrode is in direct contact with the nonconductive substrate;
• an etch stop layer on the semiconductor layer, wherein the source electrode and drain electrode do not overlap the etch stop layer;
• a gate insulator layer on the etch stop layer;
• and
• a gate electrode on the gate insulation layer.

A method of making a thin-film transistor comprising:

• forming a layered structure that includes a nonconductive substrate, a semiconductor layer on and in direct contact with the nonconductive substrate, an etch stop layer covering a central area of the semiconductor layer peripheral portions of the semiconductor not covered by the etch stop layer, and a photoresist layer on the etch stop layer;
• depositing a conductive layer on the photoresist layer, on the nonconductive substrate, and on the semiconductor layer at the portions that are not covered by the etch stop layer;
• etching away the photoresist material to remove the conductive material overlying the photoresist material to form a source electrode and a drain electrode from the conductive layer, wherein the source electrode overlaps a first peripheral portion of the semiconductor layer not covered by the etch stop layer, wherein the drain electrode overlaps a second peripheral portion of the semiconductor layer not covered by the etch stop layer, wherein the source electrode and the drain electrode do not overlap the etch stop layer, and wherein each of the source electrode and the drain electrode are in direct contact with the nonconductive substrate;
• and
• depositing a gate electrode on the etch stop layer that is electrically insulated relative to the source electrode, the drain electrode, and the semiconductor layer.