Back to results
US 11,887,991 B2Granted
Display apparatus and method of manufacturing the same
AssigneeSamsung Display Co., Ltd.
InventorsKyoung Seok Son, Myounghwa Kim, Jaybum Kim, Yeon Keon Moon, Masataka Kano
Life of this patent
Estimating the term…
Abstract
A display apparatus includes a base substrate, a polysilicon active pattern disposed on the base substrate, including polycrystalline silicon, including a source region and a drain region each doped with impurities and a channel region between the source region and the drain region, and including indium, a first gate electrode overlapping the channel region, and a source electrode electrically connected to the source region and a drain electrode electrically connected to the drain region.
Claims18
A display apparatus, comprising:
- a base substrate;
- a first active pattern disposed on the base substrate, the first active pattern including polycrystalline silicon;
- a gate electrode overlapping a first portion of the first active pattern;
- at least one first insulation layer disposed on the gate electrode;
- a source electrode electrically connected to a second portion of the first active pattern and a drain electrode electrically connected to a third portion of the first active pattern;
- a second active pattern disposed on the first insulation layer, the second active pattern including an oxide semiconductor;
- and
- an oxide semiconductor pattern disposed between the source electrode and the second portion of the first active pattern and between the drain electrode and the third portion of the first active pattern, the oxide semiconductor pattern directly contacting the second and third portions of the first active pattern, wherein
- the first portion of the first active pattern is a channel of a transistor, the second portion of the first active pattern is a source of the transistor, the third portion of the first active pattern is a drain of the transistor.
6 more elements
A display apparatus, comprising:
- a base substrate;
- a first active pattern disposed on the base substrate, the first active pattern including polycrystalline silicon;
- a gate electrode overlapping a first portion of the first active pattern;
- at least one first insulation layer disposed on the gate electrode;
- a source electrode electrically connected to a second portion of the first active pattern and a drain electrode electrically connected to a third portion of the first active pattern;
- a second active pattern disposed on the first insulation layer, the second active pattern including an oxide semiconductor;
- and
- an oxide semiconductor pattern disposed between the source electrode and the drain electrode on the first insulation layer, the oxide semiconductor pattern being adjacent to and separate from the source electrode and the drain electrode such that the oxide semiconductor pattern is not electrically connected to the source electrode and the drain electrode.
5 more elements
Dependencies are inferred from the claim text.