Lateral surge protection devices
AssigneeSemiconductor Components Industries, LLC
InventorYupeng Chen
Life of this patent
Estimating the term…
Abstract
In a general aspect, an apparatus can include a semiconductor layer of a first conductivity type and a lateral bipolar device disposed in the semiconductor layer. The apparatus can further include an isolation trench disposed in the semiconductor layer in a base region of the lateral bipolar device. The isolation trench can be disposed between an emitter implant of the lateral bipolar device and a collector implant of the lateral bipolar device. The emitter implant and the collector implant can be of a second conductivity type, opposite the first conductivity type.
Claims20
An apparatus comprising:
- a semiconductor layer of a first conductivity type;
- a lateral bipolar device disposed in the semiconductor layer;
- and
- an isolation trench disposed in the semiconductor layer in a base region of the lateral bipolar device, the isolation trench being disposed between an emitter implant of the lateral bipolar device and a collector implant of the lateral bipolar device, the emitter implant and the collector implant being of a second conductivity type, opposite the first conductivity type, the isolation trench having a depth in the semiconductor layer that is greater than a depth of the emitter implant in the semiconductor layer, and greater than a depth of the collector implant in the semiconductor layer, wherein the isolation trench is not disposed between the emitter implant and a base implant disposed in the semiconductor layer.
An apparatus comprising:
- a semiconductor layer of p-type conductivity;
- a lateral NPN transistor disposed in the semiconductor layer, the lateral NPN transistor including:
- a collector implant disposed in the semiconductor layer, the collector implant being of n-type conductivity;
- an emitter implant disposed in the semiconductor layer, the emitter implant being of n-type conductivity;
- and
- a base implant disposed in the semiconductor layer adjacent to the emitter implant, the base implant being of p-type conductivity;
- and
- an isolation trench disposed in the semiconductor layer in a base region of the lateral NPN transistor, the isolation trench being disposed between the collector implant and the emitter implant, and disposed between the collector implant and the base implant, wherein the isolation trench is not disposed between the emitter implant and the base implant, the isolation trench having a depth in the semiconductor layer that is greater than a depth of the emitter implant in the semiconductor layer, and greater than a depth of the collector implant in the semiconductor layer.
An apparatus comprising:
- a semiconductor layer of n-type conductivity;
- a lateral silicon-controlled rectifier (SCR) disposed in the semiconductor layer, the lateral SCR including:
- a first p-type implant disposed in the semiconductor layer, the first p-type implant being included in an emitter of a PNP transistor of the lateral SCR;
- a first n-type implant disposed in the semiconductor layer, the first n-type implant being included in a base of the PNP transistor and a collector of an NPN transistor of the lateral SCR;
- a second p-type implant disposed in the semiconductor layer, the second p-type implant being included in a collector of the PNP transistor and a base of the NPN transistor;
- and
- a second n-type implant disposed in the semiconductor layer, the second n-type implant being included in an emitter of the NPN transistor;
- and
- an isolation trench disposed in the semiconductor layer in a base region of the PNP transistor and a collector region of the NPN transistor, at least a portion of the semiconductor layer being included in the base region of the PNP transistor and the collector region of the NPN transistor, wherein the isolation trench is not disposed between the second p-type implant and the second n-type implant, the isolation trench having a depth in the semiconductor layer that is greater than a depth of the first p-type implant in the semiconductor layer, greater than a depth of the first n-type implant in the semiconductor layer, greater than a depth of the second p-type implant in the semiconductor layer, and greater than a depth of the second n-type implant in the semiconductor layer.
Dependencies are inferred from the claim text.