Semiconductor package

A semiconductor package, comprising:

• a first substrate;
• a first semiconductor chip mounted on the first substrate;
• a second semiconductor chip disposed on a top surface of the first semiconductor chip;
• a third semiconductor chip spaced apart from the first semiconductor chip and disposed on a bottom surface of the second semiconductor chip;
• an insulating layer that surrounds the first and second semiconductor chips on the first substrate;
• a second substrate disposed on the insulating layer and the second semiconductor chip and on which the second semiconductor chip is mounted;
• a connection terminal that penetrates the insulating layer at a side of the first and, second semiconductor chips and is connected to the first and second substrates;
• and
• an antenna pattern disposed on a top surface of the second substrate and that is electrically connected to the second semiconductor chip, wherein the antenna pattern generates broadside radiation and comprises a plurality of patch patterns,
• wherein the second semiconductor chip is connected to the antenna pattern through the second substrate,
• wherein the first semiconductor chip is connected to the antenna pattern through the first substrate, the connection terminal and the second substrate,
• wherein an inactive surface of the third semiconductor chip faces an inactive surface of the second semiconductor chip, and
• wherein, at an interface of the second and third semiconductor chips, an upper portion of the third semiconductor chip and a lower portion of the second semiconductor chip constitute one body formed of a same material.

A semiconductor package, comprising:

• a first substrate;
• a first semiconductor chip mounted on a top surface of the first substrate wherein a first active surface of the first semiconductor chip faces the first substrate;
• a second substrate disposed on the first semiconductor chip;
• a second semiconductor chip mounted on a bottom surface of the second substrate wherein a second active surface of the second semiconductor chip faces the second substrate;
• and
• wherein an upper portion of the first semiconductor chip and a lower portion of the second semiconductor chip contain an insulating material, the insulating material includes oxygen or nitrogen, the upper portion of the first semiconductor chip includes an oxide, a nitride or an oxynitride of a semiconductor material of the first semiconductor chip, the lower portion of the second semiconductor chip includes an oxide, a nitride or an oxynitride of a semiconductor material of the second semiconductor chip, and a concentration of oxygen or nitrogen in the upper portion of the first semiconductor chip and a concentration of oxygen or nitrogen in the lower portion of the second semiconductor chip decreases with increasing distance from an interface of the first and second semiconductor chips;
• an antenna pattern disposed on a top surface of the second substrate,
• wherein, at an interface of the first and second semiconductor chips, an upper portion of the first semiconductor chip and a lower portion of the second semiconductor chip constitute one body formed of the same material, wherein the antenna pattern generates broadside radiation and comprises a plurality of patch patterns, and
• wherein the antenna pattern is disposed on a top surface of an insulating pattern of the second substrate and is connected to an interconnection pattern disposed in the insulating pattern.