US 11,887,946 B2Granted

Semiconductor packages with antennas

AssigneeIntel Corporation

InventorsTelesphor Kamgaing, Adel A. Elsherbini, Sasha N. Oster

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Abstract

In various embodiments, disclosed herein are systems and methods directed to the fabrication of a coreless semiconductor package (e.g., a millimeter (mm)-wave antenna package) having an asymmetric build-up layer count that can be fabricated on both sides of a temporary substrate (e.g., a core). The asymmetric build-up layer count can reduce the overall layer count in the fabrication of the semiconductor package and can therefore contribute to fabrication cost reduction. In further embodiments, the semiconductor package (e.g., a millimeter (mm)-wave antenna packages) can further comprise dummification elements disposed near one or more antenna layers. Further, the dummification elements disposed near one or more antenna layers can reduce image current and thereby increasing the antenna gain and efficiency.

Claims22

Dependent claims

An antenna package, comprising:

a plurality of dielectric redistribution layers, the plurality of dielectric redistribution layers having a top side and a bottom side, the plurality of dielectric redistribution layers comprising a plurality of dielectric layers, a plurality of metal layers, and a plurality of vias;
an interface layer on the top side of the plurality of dielectric redistribution layers;
a die above the interface layer, the die coupled to the top side of the plurality of dielectric redistribution layers by a plurality of solder balls, the plurality of solder balls extending through the interface layer;
a first dielectric layer on the bottom side of the plurality of dielectric redistribution layers;
a via in the first dielectric layer;
a first antenna element coupled to the via, the first antenna element vertically beneath the die;
a second dielectric layer on the first dielectric layer and on the first antenna element;
a second antenna element on the second dielectric layer, the second antenna element vertically beneath the first antenna element;
and
a third dielectric layer on the second dielectric layer and on the second antenna element.

7 more elements

An antenna package, comprising:

a die above an interface layer;
a plurality of solder balls in the interface layer and coupled to the die;
a first metal line below the interface layer, the wherein the plurality of solder balls are coupled to the first metal line;
a first dielectric layer below the first metal line, the first dielectric layer having a via therein;
a second metal line below the first dielectric layer;
a second dielectric layer below the second metal line, the second dielectric layer having a via therein;
a third metal line below the second dielectric layer;
a third dielectric layer below the third metal line, the third dielectric layer having a via therein;
a fourth metal line below the third dielectric layer;
a fourth dielectric layer below the third metal line, the fourth dielectric layer having a via therein;
a fifth metal line below the fourth dielectric layer;
a fifth dielectric layer below the fifth metal line, the fifth dielectric layer having a via therein;
a sixth dielectric layer below the fifth dielectric layer;
a via in the sixth dielectric layer;
a first antenna element coupled to the via, the first antenna element vertically beneath the die;
a seventh dielectric layer on the sixth dielectric layer and on the first antenna element;
a second antenna element on the seventh dielectric layer, the second antenna element vertically beneath the first antenna element;
an eighth dielectric layer on the seventh dielectric layer and on the second antenna element;
and
a dummification element laterally spaced apart from the second antenna element.

17 more elements

An antenna package, comprising:

a die above an interface layer;
a plurality of solder balls in the interface layer and coupled to the die;
a first metal line below the interface layer, the wherein the plurality of solder balls are coupled to the first metal line;
a first dielectric layer below the first metal line, the first dielectric layer having a via therein;
a second metal line below the first dielectric layer;
a second dielectric layer below the second metal line, the second dielectric layer having a via therein;
a third metal line below the second dielectric layer;
a third dielectric layer below the third metal line, the third dielectric layer having a via therein;
a fourth metal line below the third dielectric layer;
a fourth dielectric layer below the third metal line, the fourth dielectric layer having a via therein;
a fifth metal line below the fourth dielectric layer;
a fifth dielectric layer below the fifth metal line, the fifth dielectric layer having a via therein;
a sixth dielectric layer below the fifth dielectric layer;
a via in the sixth dielectric layer;
a first antenna element coupled to the via, the first antenna element vertically beneath the die;
a seventh dielectric layer on the sixth dielectric layer and on the first antenna element;
a second antenna element on the seventh dielectric layer, the second antenna element vertically beneath the first antenna element;
an eighth dielectric layer on the seventh dielectric layer and on the second antenna element;
and
a dummification element laterally spaced apart from the first antenna element.

17 more elements

Dependencies are inferred from the claim text.

Facts

Application: 17/958,300Filed 30 Sep 2022 · continuation
Priority: 8 Apr 2020
Published: US 2023/0077949 A116 Mar 2023
Granted: 30 Jan 2024
Term ends: Not estimatedThe source records don’t support an estimate.

Classification16 codes

H10W 44/20
Electrical arrangements for controlling or matching impedance: at high-frequency [HF] or radio frequency [RF]
H01Q 1/2283
By structural association with other equipment or articles: mounted in or on the surface of a semiconductor substrate as a chip-type antenna or…
H01Q 9/0414
Substantially flat resonant element parallel to ground plane, e.g. patch antenna: in a stacked or folded configuration
H01Q 19/005
Combinations of primary active antenna elements and units with secondary devices, e.g. with quasi-optical devices, for giving the antenna a…:…

Family

PCT/US2016/040828Parent of this continuation · filed 1 Jul 2016
Application16/843,803Parent of this continuation · filed 8 Apr 2020
US 10,804,227 B2Parent of this continuation · filed 13 Oct 2020
US 2023/0077949 A1Pre-grant publication · published 16 Mar 2023
US 11,562,971 B2Parent of this continuation
Application16/312,904Parent of this continuation
US 2019/0333882 A1Published application
US 2020/0286841 A1Published application
US 11,887,946 B2This patent

From the US filing history. Foreign family members aren’t listed.