Semiconductor device including alignment key, electronic system, and method of forming the same

A semiconductor device comprising:

• a substrate comprising a first area, and a second area spaced apart from the first area;
• a first stack structure comprising a plurality of first insulating layers and a plurality of first wiring layers repeatedly and alternately stacked in the first area on a substrate;
• a second stack structure comprising a plurality of second insulating layers and a plurality of second wiring layers repeatedly and alternately stacked on the first stack structure;
• a first channel hole extending through the first stack structure;
• a second channel hole extending through the second stack structure and communicating with the first channel hole;
• a channel structure in the first channel hole and the second channel hole;
• a bit line on the channel structure;
• a first auxiliary stack structure comprising the plurality of first insulating layers and a plurality of first mold layers repeatedly and alternately stacked in the second area on the substrate;
• an alignment key extending into the first auxiliary stack structure and protruding to a higher level than an uppermost end of the first stack structure;
• and
• a second auxiliary stack structure disposed on the first auxiliary stack structure and the alignment key, the second auxiliary stack structure comprising the plurality of second insulating layers and a plurality of second mold layers repeatedly and alternately stacked,
• wherein the second auxiliary stack structure comprises a protrusion aligned with the alignment key, and
• wherein an uppermost end of the protrusion protrudes to a higher level than an uppermost end of the second stack structure.

An electronic system comprising:

• a main substrate;
• a semiconductor device on the main substrate;
• and
• a controller electrically connected to the semiconductor device on the main substrate,
• wherein the semiconductor device comprises
• a substrate comprising a first area, and a second area spaced apart from the first area,
• a first stack structure comprising a plurality of first insulating layers and a plurality of first wiring layers repeatedly and alternately stacked in the first area on a substrate,
• a second stack structure comprising a plurality of second insulating layers and a plurality of second wiring layers repeatedly and alternately stacked on the first stack structure,
• a first channel hole extending through the first stack structure,
• a second channel hole extending through the second stack structure and communicating with the first channel hole,
• a channel structure in the first channel hole and the second channel hole,
• a bit line on the channel structure,
• a first auxiliary stack structure comprising the plurality of first insulating layers and a plurality of first mold layers repeatedly and alternately stacked in the second area on the substrate,
• an alignment key extending into the first auxiliary stack structure and protruding to a higher level than an uppermost end of the first stack structure, and
• a second auxiliary stack structure disposed on the first auxiliary stack structure and the alignment key, the second auxiliary stack structure comprising the plurality of second insulating layers and a plurality of second mold layers repeatedly and alternately stacked,
• wherein the second auxiliary stack structure comprises a protrusion aligned with the alignment key, and
• wherein an uppermost end of the protrusion protrudes to a higher level than an uppermost end of the second stack structure.