Techniques to inhibit delamination from flowable gap-fill dielectric

An integrated circuit device, comprising:

• a semiconductor substrate comprising a first region and a second region;
• a hydrophobic dielectric above the semiconductor substrate, wherein the hydrophobic dielectric has an upper surface extending over the first region and the second region;
• an interfacial layer over the hydrophobic dielectric, the interfacial layer having a hydrophilic upper surface having a greater maximum height over the semiconductor substrate in the first region than in the second region;
• and
• an interlayer dielectric adhering to the hydrophilic upper surface.

An integrated circuit device, comprising:

• an array of memory cells over a semiconductor substrate;
• a hydrophobic dielectric that fills gaps between the memory cells and has an upper surface that is variable in height over the semiconductor substrate;
• an interlayer dielectric disposed above the hydrophobic dielectric;
• and
• an interfacial layer of hydrophilic dielectric between the interlayer dielectric and the hydrophobic dielectric;
• wherein the interfacial layer is in direct contact with the hydrophobic dielectric and the interlayer dielectric.