Semiconductor package including test pad

A semiconductor package comprising:

• a base including a base bonding structure and on a lower structure;
• a connection structure between the lower structure and the base;
• a first semiconductor chip on a first region of the base;
• and
• a second semiconductor chip on a second region of the base and spaced apart from the first semiconductor chip in a first direction that is parallel to an upper surface of the lower structure,
• wherein the base bonding structure of the base includes a base insulating layer, a first base pad, a base test pad and a second base pad,
• wherein the first semiconductor chip includes a first semiconductor substrate, a first bonding structure, and a first internal circuit structure between the first semiconductor substrate and the first bonding structure,
• wherein the first bonding structure includes a first insulating layer bonded to the base insulating layer, and a first front side pad bonded to the first base pad along planar surfaces of the first front side pad and the first base pad that face each other,
• wherein the second semiconductor chip includes a second semiconductor substrate, a second bonding structure, and a second internal circuit structure between the second semiconductor substrate and the second bonding structure,
• wherein the second bonding structure includes a second insulating layer bonded to the base insulating layer and a second front side pad bonded to the second base pad along planar surfaces of the second front side pad and the second base pad that face each other, and
• wherein the base test pad does not overlap the second semiconductor chip in a vertical direction that is perpendicular to the upper surface of the lower structure,
• wherein the base test pad does not overlap the first front side pad of the first semiconductor chip and overlaps a lower surface of the first insulating layer of the first semiconductor chip in the vertical direction, and
• wherein the lower surface of the first insulating layer and a lower surface of the first front side pad are coplanar with each other, and
• wherein a center of an upper surface of the base test pad contacts the lower surface of the first insulating layer.