Fail Bit repair method and device
AssigneeChangxin Memory Technologies, Inc.
InventorYui-Lang Chen
Life of this patent
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Abstract
A Fail Bit (FB) repair method and device can be applied to repairing an FB in a chip. The method includes: a bank to be repaired including multiple target repair regions in a chip to be repaired is determined; first repair processing is performed on a first FB in each target repair region by using a redundant circuit; a second FB position determination step is executed to determine a bit position of a second FB, and second repair processing is performed on the second FB; unrepaired FBs in each target repair region is determined, and the second FB position determination step is recursively executed to obtain a test repair position of each unrepaired FB to perform third repair processing on the unrepaired FB according to the test repair position.
Claims19
A Fail Bit (FB) repair method, comprising:
- determining a bank to be repaired of a chip to be repaired, the bank to be repaired comprising multiple target repair regions;
- performing first repair processing on a first FB in each target repair region by using a redundant circuit;
- after first repair processing is performed, executing a second FB position determination step to determine a bit position of a second FB in each target repair region, and performing second repair processing on the second FB according to the bit position of the second FB;
- and
- determining unrepaired FBs in each target repair region, and recursively executing the second FB position determination step to obtain a test repair position of each unrepaired FB to perform third repair processing on the unrepaired FB according to the test repair position;
- wherein after the determining the bank to be repaired of the chip to be repaired, the method further comprises:
- determining a division column of the bank to be repaired, a width of the division column being determined according to a number of row-direction equivalent bits in a Data Queue (DQ) after compression processing;
- and
- performing column division processing on the bank to be repaired according to the division column to form the multiple target repair regions.
A Fail Bit (FB) repair device, comprising:
- a memory for storing instructions;
- and
- a processor configured to execute the instructions to perform operations of:
- determining a bank to be repaired of a chip to be repaired, the bank to be repaired comprising multiple target repair regions;
- performing first repair processing on a first FB in each target repair region by using a redundant circuit;
- after first repair processing is performed, executing a second FB position determination step to determine a bit position of a second FB in each target repair region, and perform second repair processing on the second FB according to the bit position of the second FB;
- and
- determining unrepaired FBs in each target repair region, and recursively execute the second FB position determination step to obtain a test repair position of each unrepaired FB to perform third repair processing on the unrepaired FB according to the test repair position;
- wherein the processor is further configured to execute the instructions to:
- after determining the bank to be repaired of the chip to be repaired, determine a division column of the bank to be repaired, a width of the division column being determined according to a number of row-direction equivalent bits in a Data Queue (DQ) after compression processing;
- and
- perform column division processing on the bank to be repaired according to the division column to form the multiple target repair regions.
A Fail Bit (FB) repair method, comprising:
- determining a bank to be repaired of a chip to be repaired, the bank to be repaired comprising multiple target repair regions;
- performing first repair processing on a first FB in each target repair region by using a redundant circuit;
- after first repair processing is performed, executing a second FB position determination step to determine a bit position of a second FB in each target repair region, and performing second repair processing on the second FB according to the bit position of the second FB;
- and
- determining unrepaired FBs in each target repair region, and recursively executing the second FB position determination step to obtain a test repair position of each unrepaired FB to perform third repair processing on the unrepaired FB according to the test repair position;
- wherein said determining the unrepaired FBs in each target repair region and recursively executing the second FB position determination step to obtain the test repair position of each unrepaired FB to perform third repair processing on the unrepaired FB according to the test repair position comprises:
- if the bank feature map state is the second initial state, determining whether the bank feature map state is consistent with a sixth determination state in the second state set, the sixth determination state comprising that the available RBL count is greater than the second preset numerical value and the maximum WL FB count is greater than the second preset numerical value;
- and
- if the bank feature map state is consistent with the sixth determination state, executing a repair processing step in the sixth determination state,
- wherein the repair processing step in the sixth determination state comprises:
- determining FBL serial numbers corresponding to the FB feature map, traversing positions corresponding to the FBL serial numbers one by one, and triggering executing of the first initial repair processing step;
- recursively executing the second FB position determination step, and determining acquired positions to be repaired as test repair positions;
- calculating test repair costs corresponding to the test repair positions, and determining a minimum test repair cost and a target repair position corresponding to the minimum test repair cost;
- and
- performing repair processing on the target repair position by using the redundant circuit.
Dependencies are inferred from the claim text.