US 11,887,645 B2 · Dual-precision analog memory cell and array

Abstract

Dual-precision analog memory cells and arrays are provided. In some embodiments, a memory cell, comprises a non-volatile memory element having an input terminal and at least one output terminal; and a volatile memory element having a plurality of input terminals and an output terminal, wherein the output terminal of the volatile memory element is coupled to the input terminal of the non-volatile memory element, and wherein the volatile memory element comprises: a first transistor coupled between a first supply and a common node, and a second transistor coupled between a second supply and the common node; wherein the common node is coupled to the output terminal of the volatile memory element; and wherein gates of the first and second transistors are coupled to respective ones of the plurality of input terminals of the volatile memory element.

Claims12

Dependent claims

An apparatus comprising:

a dual-precision analog memory cell comprising:
a non-volatile memory element having an input terminal, a first output terminal, and a second output terminal,
a volatile memory element comprising:
a first transistor having a drain electrically coupled to the input terminal of the non-volatile memory element, and
a second transistor having a source electrically coupled to the input terminal of the non-volatile memory element;
and
a controller configured to read a weight stored in the dual precision analog memory cell by:
biasing a source of the first transistor to a read voltage,
biasing a drain of the second transistor to a low supply voltage,
biasing a gate of the first transistor at a low voltage,
biasing a gate of the second transistor at the low voltage, and
biasing the first output terminal of the non-volatile memory element at the read voltage and the second output terminal of the non-volatile memory element at the low voltage, wherein the read voltage is higher than the low voltage.

9 more elements

A method for reading a weight stored in a dual precision analog memory cell wherein:

the memory cell comprises:
a dual-precision analog memory cell comprising a non-volatile memory element having an input terminal, a first output terminal, and a second output terminal,
a volatile memory element comprising a first transistor having a drain electrically coupled to the input terminal of the non-volatile memory element, and
a second transistor having a source electrically coupled to the input terminal of the non-volatile memory element;
and
the method comprises:
biasing a source of the first transistor to a read voltage,
biasing a drain of the second transistor to a low supply voltage,
biasing a gate of the first transistor at a low voltage,
biasing a gate of the second transistor at the low voltage, and
biasing the first output terminal of the non-volatile memory element at the read voltage and the second output terminal of the non-volatile memory element at the low voltage, wherein the read voltage is higher than the low voltage.

8 more elements

Dependencies are inferred from the claim text.

Dual-precision analog memory cell and array

Life of this patent

Dual-precision analog memory cell and array

Life of this patent

Abstract

Claims12