US 11,887,558 B1 · Method and apparatus for memory management in a video processing system

Abstract

An integrated circuit (IC) includes a video buffer memory and display driver circuitry. The video buffer memory includes a buffer memory map. The video buffer memory stores one or more raster lines of video data organized as tiled lines. Each of the tiled lines including two quartiles. The display driver circuitry is coupled to the video buffer memory. The display driver circuitry writes data associated with a portion of a first data line to a first one of the two quartiles of a first one of the tiled lines, and updates the buffer memory map. Further, the display driver determines a full display line being present within the video buffer memory based on the buffer memory map. The display driver further outputs the full display line to a display device.

Claims20

Dependent claims

An integrated circuit (IC) device comprising:

a video buffer memory comprising a buffer memory map, the video buffer memory configured to store one or more raster lines of video data organized as tiled lines, each of the tiled lines including two quartiles;
and
display driver circuitry coupled to the video buffer memory, wherein the display driver circuitry is configured to:
write data associated with a portion of a first data line to a first one of the two quartiles of a first one of the tiled lines, and update the buffer memory map;
determine a full display line being present within the video buffer memory based on the buffer memory map;
and
output the full display line to a display device.

4 more elements

Dependencies are inferred from the claim text.

Method and apparatus for memory management in a video processing system

Life of this patent

Method and apparatus for memory management in a video processing system

Life of this patent

Abstract

Claims20