Dynamic prioritization of system-on-chip interconnect traffic using information from an operating system and hardware
AssigneeIntel Corporation
InventorsYanru Li, William Zand, Thomas Klingenbrunn, Ali Taha
Life of this patent
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AssigneeIntel Corporation
InventorsYanru Li, William Zand, Thomas Klingenbrunn, Ali Taha
Estimating the term…
Embodiments of apparatuses and methods for dynamic prioritization of interconnect traffic in a system-on-chip are described. In an embodiment, an apparatus includes first circuitry to use a first weight value to weight operating system priority information to generate a first weighted priority value, second circuitry to use a second weight value to weight system-on-chip (SoC) hardware priority information to generate a second weighted priority value, third circuitry to sum the first weighted priority value and the second weighted priority value to generate a quality of service (QoS) value for an SoC interconnect transaction, and an arbiter to use the QoS value to prioritize the SoC interconnect transaction on an SoC interconnect.
An apparatus comprising:
A method comprising:
A system-on-chip (SoC) comprising:
Dependencies are inferred from the claim text.