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AssigneeIntel Corporation
InventorsChuanxiao Dong, Yaozu Dong, Zhiyuan Lv, Zhi Wang
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Implementations disclosed describe a system and a method to execute a virtual machine on a processing device, receive a request to access a memory page identified by a guest virtual memory address (GVA) in an address space of the virtual machine, translate the GVA to a guest physical memory address (GPA) using a guest page table (GPT) comprising a GPT entry mapping the GVA to the GPA, translate the GPA to a host physical address (HPA) of the memory page, store, in a translation lookaside buffer (TLB), a TLB entry mapping the GVA to the HPA, modify the GPT entry to designate the memory page as accessed, detect an attempt by an application to modify the GPT entry; generate, in response to the attempt to modify the GPT entry, a page fault; and flush, in response to the page fault, the TLB entry.
A system comprising:
A computer-implemented method comprising:
A non-transitory computer-readable storage medium storing instructions, that when executed by a processor, cause the processor to:
Dependencies are inferred from the claim text.