Back to results
US 11,886,881 B2Granted
Decoupled access-execute processing and prefetching control
AssigneeArm Limited
InventorsMbou Eyole, Michiel Willem Van Tol, Stefanos Kaxiras
Life of this patent
Estimating the term…
Abstract
Apparatuses and methods are provided, relating to the control of data processing in devices which comprise both decoupled access-execute processing circuitry and prefetch circuitry. Control of the access portion of the decoupled access-execute processing circuitry may be dependent on a performance metric of the prefetch circuitry. Alternatively or in addition, control of the prefetch circuitry may be dependent on a performance metric of the access portion.
Claims20
Apparatus comprising:
- instruction fetch circuitry to retrieve a sequence of instructions;
- instruction processing circuitry comprising decoupled access-execute processing circuitry comprising an access portion and an execute portion, wherein the access portion is arranged to execute load-related instructions of the sequence of instructions and to cause data items to be retrieved from memory as a result of the load-related instructions to be locally stored for access by the execute portion,
- and the execute portion is arranged to execute data processing instructions of the sequence of instructions comprising accessing locally stored operands of the data processing instructions;
- and memory access circuitry comprising:
- a data cache for temporary storage of data items retrieved from memory by the instruction processing circuitry;
- prefetch circuitry responsive to an identified pattern of data retrieval by the instruction processing circuitry to extrapolate the identified pattern and cause data items from predicted addresses to be retrieved from memory and stored in the data cache based on the extrapolated pattern,
- wherein the apparatus is arranged to carry out at least one of:
- control of the access portion in dependence on a performance metric of the prefetch circuitry;
- and
- control of the prefetch circuitry in dependence on a performance metric of the access portion.
7 more elements
A method of data processing comprising:
- retrieving a sequence of instructions for execution by decoupled access-execute processing circuitry comprising an access portion, an execute portion, and a decoupled access buffer;
- executing load-related instructions of the sequence of instructions in the access portion;
- storing data items retrieved from memory as a result of the load-related instructions in the decoupled access buffer;
- executing data processing instructions of the sequence of instructions in the execute portion comprising accessing operands of the data processing instructions stored in the decoupled access buffer;
- storing data items retrieved from memory in a data cache;
- using prefetch circuitry to identify a pattern of data retrieval from memory and to extrapolate the identified pattern;
- using the prefetch circuitry to retrieve data items from predicted addresses in memory and stored in the data cache based on the extrapolated pattern;
- and carrying out at least one of:
- control of the access portion in dependence on a performance metric of the prefetch circuitry;
- and
- control of the prefetch circuitry in dependence on a performance metric of the access portion.
8 more elements
Dependencies are inferred from the claim text.