Memory select register to simplify operand mapping in subroutines

A system comprising:

• one or more memory devices;
• and
• a system-on-a-chip (SOC) coupled to the one or more memory devices, the SOC comprising:
• one or more central processing unit (CPU) processors;
• and
• a peripheral circuit comprising a peripheral processor that comprises:
• a plurality of data memories configured to store data operands for the peripheral processor, wherein a given one of the plurality of data memories includes a respective range of multiple addressable memory locations;
• and
• an execution circuit coupled to the plurality of data memories, wherein:
• the execution circuit is configured to execute instructions defined by an instruction set architecture (ISA) implemented by the peripheral processor;
• at least one of the instructions defined by the ISA specifies at least one operand stored in a particular one of the plurality of data memories by specifying a first virtual memory select value for selecting the particular one of the plurality of data memories and an address within the particular one of the plurality of data memories;
• the execution circuit includes a memory select register that is configured to store a programmable mapping of respective virtual memory select values to respective physical memory select values for the plurality of data memories;
• and
• the execution circuit is configured to map the first virtual memory select value to a first physical memory select value corresponding to the particular one of the plurality of data memories and to access the particular one of the plurality of data memories to access the at least one operand.

A method comprising:

• executing a load operation in a processor that includes a plurality of data memories configured to store data operands for the processor, wherein a given one of the plurality of data memories includes a respective range of multiple addressable memory locations, and wherein the load operation specifies a memory operand stored in a particular one of the plurality of data memories by specifying a virtual memory select value for selecting the particular one of the plurality of data memories and an address within the particular one of the plurality of data memories;
• mapping the virtual memory select value to a physical memory select value corresponding to the particular one of the plurality of data memories using a mapping stored in a memory select register, of respective virtual memory select values to respective physical memory select values for the plurality of data memories;
• and
• accessing the particular one of the plurality of data memories with the address to obtain the memory operand.