Interrupt mode or polling mode for memory devices
AssigneeMicron Technology, Inc.
InventorsFederica Cresci, Nicola Del Gatto, Massimiliano Turconi, Massimiliano Patriarca
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AssigneeMicron Technology, Inc.
InventorsFederica Cresci, Nicola Del Gatto, Massimiliano Turconi, Massimiliano Patriarca
Estimating the term…
Methods, systems, and devices for event management for memory devices are described. A memory system may include a frontend (FE) queue and a backend (BE). Each queue may include an interface that can be operated in an interrupt mode or a polling mode based on certain metrics. For example, the interface associated with the FE queue may be operated in a polling mode or an interrupt mode based on whether a quantity of commands being executed on one or more memory devices of the memory system satisfies a threshold value. Additionally or alternatively, the interface associated with the BE queue may be operated in a polling mode or an interrupt mode based on whether a quantity of active logical block addresses (LBAs) associated with one or more operations being executed on one or more memory devices of the memory system satisfies a threshold value.
A memory system, comprising:
A memory system, comprising:
A memory system, comprising:
Dependencies are inferred from the claim text.