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AssigneeSamsung Electronics Co., Ltd.
InventorsChanha Kim, Gyeongmin Nam, Seungryong Jang
Estimating the term…
A controller includes a central processing unit (CPU) configured to insert a latest received logical address, received together with a write command and data from a host, into a logical address list; a hotness determining circuit configured to assign a maximum weight to the latest received logical address, decrease weights of received logical addresses included in the logical address list by a decay factor, and sum weights of the received logical addresses having values, equal to a value of the latest received logical address, to determine hotness of the latest received logical address; and a parameter adjustment circuit decreasing a magnitude of the decay factor based on the repeatability index of the received logical addresses included in the logical address list, wherein the CPU is configured to control the memory device to store the data in one of the memory regions based on the hotness.
A controller for controlling a memory device including a first memory region and a second memory region having a first bit-density and a second bit density, respectively, comprising:
A method of operating a storage device including a first memory region and a second memory region having different bit-densities, comprising:
A storage device comprising:
Dependencies are inferred from the claim text.