Method and system for adjusting memory, and semiconductor device
AssigneeChangxin Memory Technologies, Inc.
InventorShu-Liang Ning
Life of this patent
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Abstract
A method for adjusting the memory includes: acquiring a mapping relationship between a temperature of a transistor, a gate voltage of the transistor, and an actual time at which data is written into the memory; acquiring a current temperature of the transistor; and adjusting the gate voltage, based on the current temperature and the mapping relationship, so that the actual time at which the data is written into the memory corresponding to the adjusted gate voltage is within a preset writing time.
Claims19
A method for adjusting a memory, wherein the memory comprises a transistor, a gate of the transistor is electrically connected with a Word Line (WL) of the memory, one of a source and a drain of the transistor is electrically connected with a Bit Line (BL) of the memory, and another one of the source and the drain of the transistor is electrically connected with a storage capacitor of the memory, the method comprising:
- acquiring a mapping relationship between a temperature of the transistor, a gate voltage of the transistor, and an actual time at which data is written into the memory;
- acquiring a current temperature of the transistor;
- and
- adjusting the gate voltage, based on the current temperature and the mapping relationship, so that the actual time at which the data is written into the memory corresponding to the adjusted gate voltage is within a preset writing time.
A system for adjusting a memory, wherein the system is applied to the memory, the system comprising:
- a first acquisition circuit, configured to acquire a mapping relationship between a temperature of a transistor, a gate voltage of the transistor, and an actual time at which data is written into the memory;
- a second acquisition circuit, configured to acquire a current temperature of the transistor;
- a processing circuit, configured to acquire an adjustment mode of the gate voltage, based on the current temperature and the mapping relationship;
- and
- an adjustment circuit, configured to adjust the gate voltage, based on the adjustment mode, so that the actual time at which the data is written into the memory corresponding to the adjusted gate voltage is within a preset writing time.
A semiconductor device, comprising a memory, and a system for adjusting the memory, wherein the system for adjusting the memory is configured to:
- acquire a mapping relationship between a temperature of the transistor, a gate voltage of the transistor, and an actual time at which data is written into the memory;
- acquire a current temperature of the transistor;
- and
- adjust the gate voltage, based on the current temperature and the mapping relationship, so that the actual time at which the data is written into the memory corresponding to the adjusted gate voltage is within a preset writing time.
Dependencies are inferred from the claim text.