Memory array accessibility
OwnerDaniel B. Penney, GAry L. Howeinventors
Life of this patent
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Abstract
Apparatuses and methods for memory array accessibility can include an apparatus with an array of memory cells. The array can include a first portion accessible by a controller of the array and inaccessible to devices external to the apparatus. The array can include a second portion accessible to the devices external to the apparatus. The array can include a number of registers that store row address that indicate which portion of the array is the first portion. The apparatus can include the controller configured to access the number of registers to allow access to the second portion by the devices external to the apparatus based on the stored row addresses.
Claims19
A method, comprising:
- reading addresses in a number of registers;
- identifying a first portion and a second portion of an array of memory cells indicated by the read addresses;
- executing instructions stored in the first portion;
- storing a result of the executed instructions within memory cells of the first portion;
- preventing data from being copied from the first portion to the second portion in response to execution of an instruction that is not stored in the first portion;
- and
- allowing access to the second portion of the array.
An apparatus, comprising:
- an array of memory cells, comprising:
- a first portion of memory cells that are inaccessible by devices external to the apparatus and that are configured to store a first set of data and a set of instructions;
- a second portion of memory cells that are accessible by the devices external to the apparatus and that are configured to store a second set of data;
- a set of address registers, wherein the set of address registers indicate which portion of the array is the inaccessible first portion;
- and
- a controller coupled to the array, the controller configured to:
- read addresses in the set of address registers;
- identify the first portion using the read addresses;
- execute instructions stored in the first portion, and store a result of the executed instructions within memory cells of the first portion;
- prevent data from being copied from the second portion to the first portion in response to execution of an instruction that is not stored in the first portion;
- and
- allow data to be copied from the second portion to the first portion in response to execution of an instruction that is stored in the first portion.
A method, comprising:
- reading addresses in a number of registers;
- identifying a first portion and a second portion of an array of memory cells indicated by the read addresses;
- executing instructions stored in the first portion, and storing a result of the executed instructions within memory cells of the first portion;
- and
- preventing:
- data from being copied from the first portion to the second portion in response to execution of an instruction that is not stored in the first portion;
- and
- data from being copied from the second portion to the first portion in response to execution of an instruction that is not stored in the first portion.
Dependencies are inferred from the claim text.