Host-assisted IO service levels utilizing false-positive signaling

A computer program product comprising a non-transitory processor-readable storage medium having stored therein program code of one or more software programs, wherein the program code, when executed by at least one processing device comprising a processor coupled to a memory, causes the processing device:

• to identify at least one logical storage device that has a first service level objective and is exhibiting a deficiency in one or more performance metrics;
• to identify one or more additional logical storage devices each having a second service level objective lower than the first service level objective and not exhibiting a deficiency in the one or more performance metrics;
• to generate at least one false-positive signal specifying the one or more additional logical storage devices as each exhibiting a deficiency in the one or more performance metrics;
• and
• to provide the at least one false-positive signal to at least one host device;
• wherein the at least one host device is configured to respond to the at least one false-positive signal by throttling input-output operations for the one or more additional logical storage devices.

A method comprising:

• identifying at least one logical storage device that has a first service level objective and is exhibiting a deficiency in one or more performance metrics;
• identifying one or more additional logical storage devices each having a second service level objective lower than the first service level objective and not exhibiting a deficiency in the one or more performance metrics;
• generating at least one false-positive signal specifying the one or more additional logical storage devices as each exhibiting a deficiency in the one or more performance metrics;
• and
• providing the at least one false-positive signal to at least one host device;
• wherein the at least one host device is configured to respond to the at least one false-positive signal by throttling input-output operations for the one or more additional logical storage devices;
• wherein the method is performed by at least one processing device comprising a processor coupled to a memory.