Detecting possible security violations in an integrated circuit

An integrated circuit comprising:

• a clock generator to receive a reference clock signal and generate a first clock signal using the reference clock signal, the reference clock signal generated by an external source;
• a counter coupled to the clock generator, the counter to maintain a first count regarding a number of cycles of the first clock signal;
• and
• a controller coupled to the counter, wherein the controller is to detect a security violation in which an attacker modifies the reference clock signal, when the first count varies from a predetermined value, the predetermined value based on a ratio between the reference clock signal and the first clock signal.

A wireless device comprising:

• a crystal oscillator to oscillate at a first frequency;
• and
• an integrated circuit coupled to the crystal oscillator, the integrated circuit comprising:
• a non-volatile memory to store a universal key for a stock keeping unit of the integrated circuit;
• an oscillator to generate a reference clock signal at the first frequency using the crystal oscillator;
• a clock generator to receive the reference clock signal at the first frequency and generate, based at least in part thereon, a second clock signal at a second frequency, the second frequency substantially greater than the first frequency;
• a counter coupled to the clock generator, the counter to maintain a first count regarding a number of cycles of the second clock signal during a cycle of the reference clock signal;
• and
• a controller coupled to the counter, wherein the controller is to prevent a compromise of the universal key based at least in part on detection of a security violation in which an attacker modifies the first frequency.