Real-time processing in computer systems

A method comprising:

• storing, in one or more buffers of a processor circuit, load and store memory requests for transmission to one or more memories external to the processor;
• storing, in one or more configuration registers of the processor circuit, information indicative of a first range of physical addresses of one or more memories that are reserved for real-time memory requests, wherein addresses in a second, non-overlapping range of physical addresses are shared between real-time and non-real-time memory requests;
• indicating, in the one or more configuration registers, portions of the one or more buffers that are reserved for real-time memory requests;
• performing, in a load-store circuit of the processor circuit, loads of data from and stores of data to the one or more memories;
• and
• tagging a particular memory request as a real-time memory request in response to detecting that a physical address of the particular memory request falls within the first range of physical addresses.

A system comprising:

• a system-on-a-chip (SoC), wherein the SoC includes:
• one or more general-purpose processing circuits;
• a memory controller circuit configured to communicate with a memory coupled to the SoC;
• an interface circuit having an auxiliary processor circuit, the auxiliary processor circuit including:
• a load-store circuit configured to perform loads of data from and stores of data to the memory;
• one or more buffers configured to store memory requests for transmission to the memory controller;
• and
• one or more configuration registers configured to store information indicating a first range of physical addresses of the memory that are reserved for real-time memory requests, wherein addresses in a second, non-overlapping range of physical addresses are shared between real-time and non-real-time memory requests, and wherein the one or more configuration registers are further configured to store information indicating portions of the one or more buffers reserved for real-time memory requests;
• wherein the auxiliary processor circuit is configured to, in response to detecting that a physical address of particular memory request is in the first range of physical addresses, tag the particular memory request as a real-time memory request;
• and
• a communications fabric comprising circuitry configured to facilitate communications between the one or more general-purpose processing circuits the memory controller, and the auxiliary processor.