Memory sub-system codeword addressing
AssigneeMicron Technology, Inc.
InventorReshmi Basu
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AssigneeMicron Technology, Inc.
InventorReshmi Basu
Estimating the term…
A method includes writing a first codeword to a first set of contiguous partitions in a first memory die of a memory device. The method further includes writing a first portion of a second codeword to a second set of contiguous partitions in the first memory die of the memory device and writing a second portion of the second codeword to a first set of contiguous partitions in a second memory die of the memory device. The method also includes writing a third codewords to a second set of contiguous partitions in the second memory die of the memory device.
A method, comprising:
An apparatus, comprising:
A system, comprising:
Dependencies are inferred from the claim text.
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Addressing or allocation; Relocation: user address space allocation, e.g. contiguous or non contiguous base addressing
Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory: in block erasable memory, e.g. flash memory
Specifically adapted to achieve a particular effect: improving the reliability of storage systems
Organizing or formatting or addressing of data: management of blocks
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Embodiments of the disclosure relate generally to memory sub-systems, and more specifically, relate to memory sub-system codeword addressing.
A memory sub-system can include one or more memory devices that store data. The memory devices can be, for example, non-volatile memory devices and volatile memory devices. In general, a host system can utilize a memory sub-system to store data at the memory devices and to retrieve data from the memory devices.
The present disclosure will be understood more fully from the detailed description given below and from the accompanying drawings of various embodiments of the disclosure.
FIG. 1 illustrates an example computing system that includes a memory sub-system in accordance with some embodiments of the present disclosure.
FIG. 2 illustrates an example memory device in accordance with some embodiments of the present disclosure.
Aspects of the present disclosure are directed to memory sub-system codeword addressing, in particular to memory sub-systems that include a memory sub-system codeword addressing component. A memory sub-system can be a storage system, storage device, a memory module, or a combination of such. An example of a memory sub-system is a storage system such as a solid-state drive (SSD). Examples of storage devices and memory modules are described below in conjunction with FIG. 1, et alibi. In general, a host system can utilize a memory sub-system that includes one or more components, such as memory devices that store data. The host system can provide data to be stored at the memory sub-system and can request data to be retrieved from the memory sub-system.
A memory device can be a non-volatile memory device. One example of a non-volatile memory device is a three-dimensional cross-point memory device that includes a cross-point array of non-volatile memory cells. Other examples of non-volatile memory devices are described below in conjunction with FIG. 1. A non-volatile memory device, such as a three-dimensional cross-point memory device, can be a package of one or more memory devices (e.g., memory dice). Each die can consist of one or more planes. Planes can be grouped into logic units. For example, a non-volatile memory device can be assembled from multiple memory dice, which can each form a constituent portion of the memory device.
Data accesses invoking one or more codewords can be performed during operation of a memory sub-system. In general, a codeword can represent a smallest collection of data that can be individually protected by an error correction scheme and can typically represent a smallest allowed access unit (e.g., a smallest collection of data that can be written and/or read as a unit) associated with the memory sub-system.