Memory controller managing strong error information and operating method thereof

A method of operating a memory controller for controlling a memory device, the method comprising:

• designating one or more cells of a memory cell array as a monitoring unit;
• collecting hard decision information based on data read from memory cells using a normal read level;
• collecting soft decision information based on data read from the memory cells using one or more offset read levels that are different from the normal read level;
• storing first strong error information determined based on the hard decision information and the soft decision information in a memory in the memory controller;
• as an uncorrectable error occurs in data read in response to a read request from a host, generating second strong error information based on the hard decision information and the soft decision information collected by re-reading the memory cells;
• and
• correcting an error in the data read in response to the read request using the first strong error information and the second strong error information.

A memory controller comprising:

• a processor configured to control a memory operation for a memory device and to designate one or more cells of a memory cell array of the memory device as a monitoring unit;
• an error correcting code (ECC) circuit configured to perform an error correction operation on data read from the memory device, to generate first strong error information based on hard decision information collected using a normal read level and soft decision information collected using one or more offset read levels for the monitoring unit of the memory device, and to generate second strong error information based on the hard decision information and the soft decision information collected again for the monitoring unit in response to a read request from a host;
• and
• a volatile memory configured to store the first strong error information or the second strong error information, wherein:
• the normal read level and the offset read levels have different values, and
• the ECC circuit corrects an error of data requested to be read from the host by using the first strong error information and the second strong error information.