System and method of testing a semiconductor device
AssigneeSK hynix Inc.
InventorGyung Jin Kim
Life of this patent
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Abstract
A system for testing a semiconductor may include a transfer chamber, at least one loadlock chamber and at least one test chamber. The transfer chamber may include a plurality of sidewalls. The loadlock chamber may be arranged on a first sidewall of the sidewalls of the transfer chamber. The loadlock chamber may include a carrier configured to receive a plurality of wafers. The test chamber may be arranged on a second sidewall of the sidewalls of the transfer chamber. When the transfer chamber is connected to the loadlock chamber, a pressure of the transfer chamber may be changed into a pressure of the loadlock chamber. When the transfer chamber is connected to the test chamber, the pressure of the transfer chamber may be changed into a pressure of the test chamber.
Claims6
A semiconductor test system comprising:
- a test chamber in which a test process is performed between a first process environment and a second process environment;
- a chamber comprising a wafer carrier configured to receive a plurality of wafers and a transfer unit configured to transfer the wafers to the test chamber, wherein the chamber is arranged to face the test chamber via a gate;
- and
- a control module that configured to adjust a process environment of the chamber and a process environment of the test chamber,
- wherein a selected one of the first process environment and the second process environment includes a temperature of −50° C. to −196° C. and a pressure of 10−5 torr to 10−7 torr.
A semiconductor test system comprising a test chamber having an internal space for performing a probe test of a wafer under a cryogenic environment, the test chamber, comprising:
- a wafer carrier configured to hold a plurality of wafer that have either undergone the probe test or are yet to be tested before the probe test;
- a prober configured to test at least one of the wafers;
- and
- a transfer unit positioned between the wafer carrier and the prober in the test chamber, wherein the transfer unit is configured to transfer the wafer that has been tested by the prober to the wafer carrier for storage or to transfer the wafer stored in the wafer carrier before the prober test onto the prober.
Dependencies are inferred from the claim text.