Integrated circuit with on-state diagnosis for driver channels
AssigneeSTMicroelectronics S.r.l.
InventorsGaudenzia Bagnati, Stefano Castorina, Valerio Bendotti
Life of this patent
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Abstract
An integrated circuit includes a plurality of power transistor driver channels for driving external loads. The driver channels can be selectively configured as high-side (HS) or low-side (LS) driver channels. The integrated circuit includes, for each driver channel, a respective on-state test circuit and a respective controller. The on-state test circuits can be selectively configured to test for HS overcurrent conditions, LS overcurrent conditions, HS open load conditions, and LS open load conditions.
Claims20
An integrated circuit, comprising:
- a driver channel configured to be selectively operated in a high-side driver mode or a low-side driver mode and including:
- a power transistor;
- a drain output terminal coupled to a drain of the power transistor;
- and
- a source output terminal coupled to a source of the power transistor;
- wherein in the high-side driver mode, an external load is coupled between the source and ground, and the drain is coupled to an external high voltage source;
- wherein in the low-side driver mode, the external load is coupled between the external high voltage source and the drain, the source is coupled to ground;
- an on-state test circuit coupled to the drain output terminal and the source output terminal and including a plurality of switches;
- and
- a control circuit coupled to the on-state test circuit and configured to control the plurality of switches to place the on-state test circuit in a high-side overcurrent testing mode or a low-side overcurrent testing mode.
An integrated circuit, comprising:
- a driver channel configured to be selectively operated in a high-side driver mode or a low-side driver mode, the driver channel including:
- a power transistor;
- a drain output terminal coupled to a drain of the power transistor;
- and
- a source output terminal coupled to a source of the power transistor;
- wherein in the high-side driver mode, an external load is coupled between the source and ground, and the drain is coupled to an external high voltage source;
- wherein in the low-side driver mode, the external load is coupled between the external high voltage source and the drain, the source is coupled to ground;
- and
- an on-state test circuit coupled to the driver channel and including a first comparator and configured to be selectively operated in a high-side overcurrent testing mode and a low-side overcurrent testing mode, wherein the on-state test circuit is configured to detect a high-side overcurrent condition of the driver channel based on the first comparator in the high-side overcurrent testing mode and to detect a low-side overcurrent condition of the driver channel based on the first comparator in the low-side overcurrent testing mode.
A method, comprising:
- operating a driver channel of an integrated circuit by driving a gate terminal of a power transistor of the driver channel;
- detecting whether a high-side overcurrent condition is present at the driver channel based on an output of a first comparator of an on-state testing circuit in a high-side overcurrent testing mode of the on-state testing circuit;
- and
- detecting whether a low-side overcurrent condition is present at the driver channel based on the output of the first comparator of the on-state testing circuit in a low-side overcurrent testing mode of the on-state testing circuit;
- and
- wherein in a high-side driver mode, an external load is coupled between a source terminal of the power transistor and ground, and a drain terminal of the power transistor is coupled to an external high voltage source,
- wherein in a low-side driver mode, the external load is coupled between the external high voltage source and the drain terminal of the power transistor, the source terminal of the power transistor is coupled to ground.
Dependencies are inferred from the claim text.