Real-time DC-balance aware AFE offset cancellation

A calibration circuit for calibrating a continuous-time linear equalizer (CTLE) included in an analog front end (AFE) for a receiver of a serial data link, the calibration circuit comprising:

• a slicer configured to output a difference between a first average output voltage corresponding to a first output node of the CTLE and a second average output voltage corresponding to a second output node of the CTLE;
• a calibration counter configured to increment or decrement an offset count based on the difference;
• and
• a latch circuit configured to latch the value of the offset count,
• wherein a plurality of programmable tail current sources of the CTLE are adjusted based on the latched value of the offset count.

A method of adjusting a direct current (DC) offset in a continuous-time linear equalizer (CTLE) included in an analog front end (AFE) for a receiver of a serial data link, the method comprising:

• receiving an input signal from a transmitter;
• determining a difference between a first average output voltage corresponding to a first output node of the CTLE and a second average output voltage corresponding to a second output node of the CTLE;
• incrementing or decrementing an offset count based on the difference;
• and
• adjusting a plurality of programmable tail current sources included in the CTLE based on a value of the offset count to adjust the DC offset between the first and second output nodes of the CTLE.