# US 11,862,460 B2 · SiC multilayer body, production method therefor, and semiconductor device

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- Number: US 11,862,460 B2
- Document ID: US11862460B2
- Status: Granted
- Kind: B2
- Application number: 17/921,409
- Filed: 2021-04-27
- Published: 2023-09-21
- Granted: 2024-01-02
- Earliest claimed: 2020-05-15
- Assignees: Cusic Inc.
- Applicants: Cusic Inc.
- Inventors: Hiroyuki Nagasawa
- Web page: https://patentgrep.com/patent/US11862460B2

## CPC

- H10P 14/2904: {Silicon carbide}
- C30B 25/186: {being specially pre-treated by, e.g. chemical or physical means}
- C30B 25/20: the substrate being of the same materials as the epitaxial layer
- C30B 29/36: Carbides
- H10D 8/60: Schottky-barrier diodes
- H10D 12/031: {of IGBTs}
- H10D 62/117: {Shapes of semiconductor bodies}
- H10D 62/40: Crystalline structures
- H10D 62/405: {Orientations of crystalline planes}
- H10D 62/8325: {Silicon carbide}
- H10D 84/035: {using silicon carbide [SiC] technology}
- H10D 84/146: {the built-in components being Schottky barrier diodes}
- H10D 84/85: Complementary IGFETs, e.g. CMOS
- H10P 14/24: using chemical vapour deposition [CVD]
- H10P 14/276: {Lateral overgrowth}
- H10P 14/2925: {Surface structures}
- H10P 14/2926: {Crystal orientations}
- H10P 14/3408: {Silicon carbide}
- H10P 14/3442: {N-type}
- H10P 14/3444: {P-type}
- H10P 14/36: {characterised by treatments done before the formation of the materials}
- H10P 50/242: {of Group IV materials}
- H10P 50/693: {characterised by their size, orientation, disposition, behaviour or shape, in horizontal or vertical plane}
- H10P 52/402: {of semiconductor materials}
- H10P 90/00: Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
- H10D 30/60: Insulated-gate field-effect transistors [IGFET] (H10D30/40 takes precedence)
- H10P 74/203: {Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects}
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- C30B: SINGLE-CRYSTAL GROWTH (by using ultra-high pressure, e.g. for the formation of diamonds, B01J3/06); UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL (zone-refining of metals or alloys C22B); PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE (casting of metals, casting of other substances by the same processes or devices B22D; working of plastics B29; modifying the physical structure of metals or alloys C21D, C22F); SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE (for producing semiconductor devices or parts thereof H10); APPARATUS THEREFOR
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

According to one embodiment, a method of producing a SiC laminate having a hexagonal SiC layer and a 3C-SiC layer comprises: forming a seed plane parallel to a close-packed plane of the crystal lattice on the surface of the hexagonal SiC layer; providing an inclined plane, which is inclined with respect to the seed plane, to all faces adjacent to the seed plane; forming a two-dimensional nucleus of 3C-SiC on the seed plane; and epitaxially growing both the two-dimensional nucleus of 3C-SiC and the SiC layers exposed on the inclined plane simultaneously in a direction parallel to the close-packed plane of the crystal lattice.

## Claims

### Claim 1

A SiC laminate, comprising:
a single crystal hexagonal SiC layer; and
a single crystal 3C-SiC layer overlaid on the hexagonal SiC layer, wherein
the 3C-SiC layer does not contain a twin boundary,
a heterointerface where the 3C-SiC layer and the hexagonal SiC layer meet is exactly parallel to close-packed planes (CPPs) of crystal lattices of the layers and is a lattice-matched coherent heterointerface,
the coherent heterointerfaces is exposed on a main surface at an inclination angle of 0.5 degrees or more and less than 73 degrees, and
a segment of the coherent heterointerface on the main surface is a polygon or a straight line with no endpoint and separates a hexagonal SiC surface and a 3C-SiC surface.

### Claim 2 (depends on 1)

The SiC laminate according to claim 1, wherein when close-packed planes (CPPs) of a crystal lattice of the hexagonal SiC layer are stacked with a periodicity of n molecular layers (n is a natural number), {−1-11} planes of a crystal lattice of the 3C-SiC layer are each parallel to each of crystal lattice planes having a three-fold symmetry relationship selected from {0-33-n} planes of the crystal lattice of the hexagonal SiC layer.

### Claim 3 (depends on 1)

A production method for the SiC laminate according to claim 1, comprising:
a seed process of forming a seed plane parallel to a close-packed plane (CPP) of a crystal lattice in one or more regions on a surface of the hexagonal SiC layer;
an off process of providing an inclined plane inclined at a positive depression angle of 0.5 degrees or more and less than 73 degrees with respect to the seed plane to all faces adjacent to the seed plane;
a nucleation process of forming a two-dimensional nucleus of 3C-SiC on the seed plane; and
a lateral epitaxy process of epitaxially growing both the two-dimensional nucleus of 3C-SiC and the SiC layers exposed on the inclined plane simultaneously in a direction parallel to the close-packed plane (CPP) of the crystal lattice.

### Claim 4 (depends on 3)

The production method according to claim 3, wherein
the inclined plane is arranged so as to divide the surface of the hexagonal SiC layer in the off process,
at least one inclined plane is a positively inclined plane inclined in a specific positive inclination direction, and
at least one inclined plane is a negatively inclined plane inclined in a negative inclination direction opposite to the positive inclination direction.

### Claim 5 (depends on 4)

The production method according to claim 4, further comprising:
matching the positive inclination direction to either a <11-20> direction or a <1-100> direction of the hexagonal SiC layer; and
extending a ridge portion and a valley portion each corresponding to a boundary between the positively inclined plane and the negatively inclined plane, linearly in a division direction of 88 degrees or more and 92 degrees or less from the positive inclination direction.

### Claim 6 (depends on 3)

The production method according to claim 3, wherein a thickness of the two-dimensional nucleus of 3C-SiC formed on the seed plane is less than a product of tangent of the inclination angle and L, where L is a minimum length in an inclination direction of a plane obtained by projecting each of inclined planes onto the close-packed plane (CPP) of the crystal lattice.

### Claim 7 (depends on 3)

The production method according to claim 3, further comprising a surface structure stabilization process of exposing the seed plane to a hydrogen gas pressure of 700 hPa or higher at a temperature of 300° C. to 550° C. for 1 hour or more prior to the nucleation process.

### Claim 8 (depends on 1)

A semiconductor device using the SiC laminate according to claim 1, comprising:
one or more n-channel metal-oxide-semiconductor field-effect transistors (NMOSFETs),
wherein a channel region of the NMOSFETs is formed only in the 3C-SiC layer.

### Claim 9 (depends on 1)

A semiconductor device using the SiC laminate according to claim 1, comprising:
one or more p-channel metal-oxide-semiconductor field-effect transistors (PMOSFETs),
wherein a channel region of the PMOSFETs is formed only in the hexagonal SiC layer.

### Claim 10 (depends on 1)

A semiconductor device using the SiC laminate according to claim 1, comprising:
one or more Schottky barrier diodes (SBDs),
wherein an anode of the SBDs is formed only on the hexagonal SiC surface.