US 11,855,642 B1 · Programmable delay circuit including threshold-voltage programmable field effect transistor

Abstract

A programmable delay structure includes at least one delay stage, each including an inverter connected between input and output nodes, a threshold voltage (VT)-programmable transistor, and a capacitor connectable to the output node through the transistor. During program mode operations, the transistor is programmed to have a low or high VT. During delay mode operation, the gate voltage is set between the low and high VTs. If the transistor has the low VT, the capacitor is connected to the output node and signal delay is increased. If the transistor has the high VT, the capacitor is not connected to the output node and signal delay is not increased. Illustrated embodiments include additional components for facilitating program mode and delay mode operations. Illustrated embodiments also include multiple delay stages where the output node of one stage is connected to the input node of the next. Also disclosed are associated operating methods.

Claims20

Dependent claims

A structure comprising:

an input node;
an output node;
an inverter connected between the input node and the output node;
a threshold voltage-programmable field effect transistor;
a capacitor electrically connectable to the output node through the threshold voltage-programmable field effect transistor;
a first access device connected between the input node and a gate structure of the threshold voltage-programmable field effect transistor and controlled by a program mode control signal;
and
a second access device connected between a power supply and the gate structure of the threshold voltage-programmable field effect transistor and controlled by a delay mode control signal.

5 more elements

A method comprising:

providing a structure comprising at least one delay stage comprising:
an input node;
an output node;
an inverter connected between the input node and the output node;
a threshold voltage-programmable field effect transistor;
and
a capacitor electrically connectable to the output node through the threshold voltage-programmable field effect transistor;
a first access device connected between the input node and a gate structure of the threshold voltage-programmable field effect transistor and controlled by a program mode control signal;
and
a second access device connected between a power supply at a first positive voltage and the gate structure of the threshold voltage-programmable field effect transistor and controlled by a delay mode control signal;
and
causing operation of the structure in a delay mode to invert a received signal at the input node and to output a delayed and inverted signal at the output node, wherein signal delay of the delayed and inverted signal is dependent upon a threshold voltage of the threshold voltage-programmable field effect transistor.

9 more elements

Dependencies are inferred from the claim text.

Programmable delay circuit including threshold-voltage programmable field effect transistor

Life of this patent

Programmable delay circuit including threshold-voltage programmable field effect transistor

Life of this patent

Abstract

Claims20