Back to results
US 11,853,671 B1Granted
Filling vacant areas of an integrated circuit design
AssigneePulsic Limited
InventorGraham Balsdon
Life of this patent
Estimating the term…
Abstract
Vacant areas of a layer of an integrated circuit design are filled with shapes connected to the appropriate nets.
Claims26
A method comprising:
- using a computer, automatically creating a first shape that is representative of free space on a first layer of an integrated circuit design;
- automatically creating a second shape that is representative of free space on a second layer of the integrated circuit design, wherein the second layer is different from the first layer;
- automatically creating a first via shape in a third layer, different from the first and second layers, that overlaps both the first and second shapes;
- determining whether the first shape is further coupled to a third shape on a fourth layer, different from the first and second layers, wherein the third shape is representative of a power voltage net;
- and
- if the first shape has a further coupling to the third shape, not discarding the first shape and the first via shape.
3 more elements
A method comprising:
- using a computer, automatically creating a first shape comprising polygons that is representative of free space on a first layer of an integrated circuit design;
- automatically creating a second shape comprising polygons that is representative of free space on a second layer of the integrated circuit design, wherein the second layer is different from the first layer;
- automatically creating a first via shape in a third layer, different from the first and second layers, that overlaps both the first and second shapes;
- when the first and second shapes do not overlap, finding a third shape on the second layer that was not automatically generated;
- automatically creating a second via shape in the third layer that overlaps both the first and third shapes;
- determining whether the first shape is further coupled to a third shape on a fourth layer, different from the first and second layers, wherein the third shape is representative of a power voltage net;
- determining whether the first shape is further coupled to a fourth shape on the second layer, wherein the third shape is representative of a power voltage net;
- and
- if the first shape has a further coupling to a third or fourth shape, not discarding the first shape and the first via shape.
6 more elements
A method comprising:
- using a computer, automatically creating a first shape that is representative of free space on a first layer of an integrated circuit design;
- automatically creating a second shape that is representative of free space on a second layer of the integrated circuit design, wherein the second layer is different from the first layer;
- automatically creating a first via shape in a third layer, different from the first and second layers, that overlaps both the first and second shapes;
- determining whether the first shape is further coupled to a third shape on a fourth layer, different from the first and second layers, wherein the third shape is representative of a ground voltage net;
- and
- if the first shape has a further coupling to the third shape, not discarding the first shape and the first via shape.
3 more elements
Dependencies are inferred from the claim text.