Device and process for fault detection of a power device

A process of implementing a power device fault detection circuit, comprising:

• implementing a first Leading Edge Blanking (LEB) configured to provide at least in part a first time period and thereafter enable a first fault detector;
• generating with the first fault detector a first fault signal when a voltage of an output signal of at least one power device exceeds a first voltage reference level after the first time period;
• implementing a second Leading Edge Blanking (LEB) configured to provide at least in part a second time period and thereafter enable a second fault detector;
• and
• generating with the second fault detector a second fault signal when a voltage of the output signal of the at least one power device exceeds a second voltage reference level after the second time period,
• wherein the first time period implemented by the first fault detector is shorter than the second time period implemented by the second fault detector.

A power device fault detection circuit, comprising:

• a first fault detector comprising a first Leading Edge Blanking (LEB), a first measurement device, and a first filtering time function;
• the first Leading Edge Blanking (LEB) is configured to implement at least in part a first time period and thereafter enable the first fault detector;
• the first fault detector configured to measure an output signal of at least one power device and output a first fault signal;
• a second fault detector comprising a second Leading Edge Blanking (LEB), a second measurement device, and a second filtering time function;
• the second Leading Edge Blanking (LEB) is configured to implement at least in part a second time period and thereafter enable the second fault detector;
• and
• the second fault detector configured to measure the output signal of the at least one power device and output a second fault signal, wherein:
• the first fault detector is configured to measure the output signal of at least one power device and output the first fault signal when a voltage of the output signal of the at least one power device exceeds a first voltage reference level;
• and
• the second fault detector is configured to measure the output signal of the at least one power device and output the second fault signal when a voltage of the output signal of the at least one power device exceeds a second voltage reference level.