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US 11,838,021 B1Granted
SiC jfet logic output level-shifting using integrated-series forward-biased jfet gate-to-channel diode junctions
OwnerMatthew Barlow, James A. Holmesinventors
Life of this patent
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Abstract
An improved electrical circuit for logic output level shifting using SiC JFETs with resistors on the input, inverting, stage and using diode degenerated JFET sources in the output stage.
Claims6
A silicon carbide junction field effect transistor logic output level shifting circuit comprising:
- an input stage including a resistor:
- a first resistorless output path including a first junction field effect transistor with a first gate, first drain, and first source, the first gate connected to the resistor;
- and
- a level shifting diode connected to the first source wherein the resistor and the level shifting diode provide compensating temperature sensitivities.
1 more element
A silicon carbide junction field effect transistor logic output level shifting circuit with an output stage, the circuit comprising:
- a resistive input stage:
- a resistorless output path including a diode degenerated junction field effect transistor with a source connected to the output stage wherein the resistive input stage and the diode degenerated junction field effect transistor provide compensating temperature sensitivities.
Dependencies are inferred from the claim text.