Detection circuit

A detection circuit, comprising:

• a generation unit provided with a plurality of output terminals and configured to generate random detection data and output one bit of the random detection data through each output terminal of the plurality of output terminals of the generation unit;
• a first drive unit provided with a plurality of first input terminals connected to the plurality of output terminals of the generation unit in one-to-one correspondence and a plurality of output terminals connected to a memory array, and the first drive unit configured to transmit the random detection data to the memory array, wherein the memory array is configured to store the random detection data;
• and
• a comparison unit provided with a plurality of first input terminals connected to the plurality of output terminals of the generation unit in one-to-one correspondence and a plurality of second input terminals connected to the memory array, and the comparison unit configured to compare first read data read from the memory array with the random detection data generated by the generation unit to obtain a first comparison result;
• wherein the generation unit comprises:
• a first mode register provided with an output terminal and configured to store trigger data in response to a mode register write instruction;
• and
• a random generator provided with an input terminal connected to the output terminal of the first mode register and a plurality of output terminals as the plurality of output terminals of the generation unit, and configured to randomly generate the random detection data according to the trigger data.