System and method for addressing data in memory
AssigneeTexas Instruments Incorporated
InventorsTimothy David Anderson, Duc Quang Bui, Joseph Zbiciak, Kai Chirca
Life of this patent
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Abstract
A digital signal processor having a CPU with a program counter register and, optionally, an event context stack pointer register for saving and restoring the event handler context when higher priority event preempts a lower priority event handler. The CPU is configured to use a minimized set of addressing modes that includes using the event context stack pointer register and program counter register to compute an address for storing data in memory. The CPU may also eliminate post-decrement, pre-increment and post-decrement addressing and rely only on post-increment addressing.
Claims20
A processor comprising:
- a memory;
- a control register including a program counter register and an event context stack pointer (ECSP) register;
- an interrupt logic unit configured to detect an event and, based on the event, cause a first address to be stored in the ECSP register;
- and
- in response to receiving a memory access request that specifies a base address register from among the program counter register and the ECSP register, the processor is configured to:
- determine a second address associated with the memory access request based on the base address register;
- and
- access the memory using the second address.
A processor comprising:
- a memory;
- a control register including a program counter register and an event context stack pointer (ECSP) register;
- and
- an interrupt logic unit configured to detect an event;
- wherein:
- in response to receiving a memory access request, the processor is configured to select between the program counter register and the ECSP register to determine a base address register to access the memory, wherein the processor selects the ECSP register in response to the event being detected by the interrupt logic unit;
- the ECSP register includes a nested interrupt counter;
- and
- the nested interrupt counter is configured to store an offset.
A method for addressing data in a memory, the method comprising:
- detecting, by an interrupt logic unit of a processor, an event;
- based on the event, storing a first address in an event context stack pointer (ECSP) register;
- receiving, by a processor, a memory access request that specifies a base address register from among the ECSP register and a program counter register;
- and
- determining, by the processor, a second address associated with the memory access request based on the base address register.
Dependencies are inferred from the claim text.