Pseudo-random number generation circuit device

A pseudo-random number generation circuit device comprising:

• a pseudo-random number generation circuit including a latch circuit which holds a next random number value in synchronization with a clock and output the next random number value as a current random number value, and a logic circuit configured based on rule data that generates the next random number value from the current random number value;
• a cycle detection circuit that detects, based on a seed, an end of a cycle of random numbers which are generated by the pseudo-random number generation circuit, random numbers in the cycle of random numbers comprising next random number values generated by the logic circuit;
• and
• a rule data generation circuit that generates new rule data at a first trigger, at which the cycle detection circuit detects the end of the cycle of random numbers, to output the new rule data to the pseudo-random number generation circuit,
• the cycle detection circuit stores as the seed the current random number value output by the latch circuit holding the next random number value which is generated by a new logic circuit configured based on the new rule data, and the pseudo-random number generation circuit generates random numbers in a new cycle of random numbers based on the seed and the new logic circuit.