Printed wiring board and method for manufacturing printed wiring board

A method for manufacturing a printed wiring board, comprising:

• forming an electrolytic plating film on an electroless plating film exposed from a first plating resist layer such that a plurality of via conductors is formed in a plurality of openings in an outermost resin insulating layer and that a conductor layer including a conductor circuit is formed on a surface of the outermost resin insulating layer;
• removing the first plating resist layer from the outermost resin insulating layer such that part of the electroless plating film covered by the first plating resist layer is exposed from the electrolytic plating;
• forming a second plating resist layer on the outermost resin insulating layer such that the second plating resist layer has a plurality of openings on the plurality of via conductors, respectively;
• applying plating in the plurality of openings in the second plating resist layer such that a plurality of metal posts is formed on the electrolytic plating film of the conductor layer and that the plurality of metal posts is positioned on the plurality of via conductors, respectively;
• removing the second plating resist layer from the outermost resin insulating layer such that the conductor circuit formed on the outermost resin insulating layer and the part of the electroless plating film exposed from the electrolytic plating are exposed;
• applying first etching on the part of the electroless plating film exposed from the electrolytic plating film such that the part of the electroless plating film exposed from the electrolytic plating film is removed from the outermost resin insulating layer;
• forming a solder resist layer on the outermost resin insulating layer such that the conductor layer including the conductor circuit and the plurality of metal posts formed on the outermost resin insulating layer are embedded in the solder resist layer;
• reducing a film thickness of the solder resist layer such that the conductor layer including the conductor circuit is embedded in the solder resist layer and that the plurality of metal posts has a plurality of upper portions protruding and exposed from the solder resist layer and a plurality of lower portions embedded in the solder resist layer, respectively;
• and
• applying second etching on the upper portions of the plurality of metal posts such that each of the metal posts has a top portion having a diameter in a range of 0.8 to 0.9 times a diameter of a respective one of the lower portions of the metal posts and that each of the upper portions of the metal posts has a height measured from the surface of the solder resist layer in a range of 3 μm to 10 μm and is formed integrally with a respective one of the lower portions.